Camera Drive Block Diagram - Panasonic SDR-H80P Service Manual

SDR-H80P
7.2.

CAMERA DRIVE BLOCK DIAGRAM

CCD UNIT
CCD MAIN
CCD
FP601 FP31
IMAGE
9
SENSOR
CCD MAIN
FP601 FP31
6 13
FP601 FP31
5 14
FP601 FP31
4 15
FP601 FP31
3 16
FP601 FP31
2 17
FP601 FP31
1 18
FP601 FP31
15
FP601 FP31
14
FP601 FP31
17
FP601 FP31
18
CCD MAIN
FP601 FP31
CF001
12
SAB MAIN
FROM B9002 B9001 SENS_TEMP_VREF
SYSCON 108 108
IC302 TG/AFE
RESIZE ADIN 0 E10
RESIZE ADIN 1 F9
CCD OUT
RESIZE ADIN 2 D8
12Bit
K4 CDS RGA
ADC
10 E9
RESIZE ADIN 3
RESIZE ADIN 4 D9
RESIZE ADIN 5 B8
RESIZE ADIN 6 D8
RESIZE ADIN 7 C7
RESIZE ADIN 8 B10
RESIZE ADIN 9 B9
V1
B7 DRIVE
V2 VD
C9 DRIVE
V3
C8
V4
HD
E8 DRIVE
V5
F8 DRIVE
TIMING
V6 GENERATER
G8
SAB
H10
4
CCD RESET
C1
5
H1
A1
2
H2
B1
1
RESIZE FCK
DLL
7
CGAFE_DTO
CGAFE_CLK
TIMING
GENERATER
CAM_CG_CS
CGRST
IC501 KAO DETECTOR
K4 RESIZE ADIN 0
J4 RESIZE ADIN 1
L5 RESIZE ADIN 2
K5
RESIZE ADIN 3
J5 RESIZE ADIN 4
RESIZE ADIN (0-9)
K6 RESIZE ADIN 5
L7 RESIZE ADIN 6
K7 RESIZE ADIN 7
J7 RESIZE ADIN 8
K8 RESIZE ADIN 9
L3 TG_VD
K3 TG_HD
G1 RESIZE_FCK36
ELVIS_CLKRST
IC402
C4
4 2
C5
ADM (0-9)
IC401 RESIZE
B1 RESIZE_FCK36
C4 TG_VD
C5 TG_HD
B8 RESIZE_FCK
N18
ADIN 0
M18
ADIN 1
L18
ADIN 2
A8
P17
ADIN 3
N17
ADIN 4
ADM (0-9)
M17
ADIN 5
L17
ADIN 6
P16
ADIN 7
N16
ADIN 8
M16 ADIN 9
H7 RESIZE ADIN 0
G7 RESIZE ADIN 1
H6 RESIZE ADIN 2
G6 RESIZE ADIN 3
H5 RESIZE ADIN 4
RESIZE ADIN (0-9)
G5 RESIZE ADIN 5
H4 RESIZE ADIN 6
G4 RESIZE ADIN 7
G3 RESIZE ADIN 8
F3 RESIZE ADIN 9
J10
J6
K9
B6
26
IC3001 AUDIO/VIDEO
ADM 0
C4 AA7
ADM 1
A5 Y7
ADM 2
B5 W7
ADM 3
B6 V7
ADM 4
C6 AA8
ADM 5
B7 Y8
ADM 6
C7 W8
ADM 7
A8 V8
ADM (0-15)
ADM 8
B8 AA9
ADM 9
A9 Y9
ADM 10
B9 W9
ADM 11
C9 V9
ADM 12
B10 AA10
ADM 13
C10 Y10
ADM 14
B11 W10
ADM 15
D10 V10
ELV_RE B2 AA6
ELV_WE
B3 AB6
ELV_ALE
B1 AB9
ELVIS_POR
W5
Y6
N18
ELVIS_CS
R2
M18
CPU_FINISH
Y5
L18
P17
N17
M17
L17
P16
N16
M16
R22
U20
U19
12MCLK A6 A8
RESIZE_VD A3
RESIZE_HD B3
IC6001 SYSTEM CONTROL
MAIN SAB
B9001 B9002
N4
55 55
B9001 B9002
P4
57 57
B9001 B9002
U4
58 58
B9001 B9002
D2
101 101
B9001 B9002
C2
99 99
B9001 B9002
A4
102 102
B9001 B9002
F10
100 100
G1
G2
H1
H2
J1
J2
MAIN SAB
K1
B9001 B9002
ADM (0-15)
K2
39 - 54 39 - 54
L1
L2
RESIZE_CS G2
M1
RESIZE_RST B5
M2
CGAFE_DTO G1
N1
CGAFE_CLK H2
N2
P1
MAIN SAB
P2
B9001 B9002
F2
103 103
B9001 B9002
W6
104 104
B9001 B9002
E1
20 20
B9001 B9002
F1
18 18
B9001 B9002
E2
19 19
B9001 B9002
D11
21 21
SDR-H80, H81, H90
CAMERA DRIVE BLOCK DIAGRAM
ADM 0
ADM 1
ADM 2
ADM 3
ADM 4
ADM 5
ADM 6
ADM 7
ADM 8
ADM 9
ADM 10
ADM 11
ADM 12
ADM 13
ADM 14
ADM 15
XRE
XWEL
ALE
ADIN 0
ADIN 1
ADIN 2
ADIN 3
ADIN 4
ADIN 5
ADIN 6
ADIN 7
ADIN 8
ADIN 9
RESIZE_FCK
RESIZE_VD
RESIZE_HD
12MCLK
XRE
XWEL
ALE
ELVIS_POR
ELVIS_CLKRST
ELVIS_CS
CPU_FINISH
ADM 0
ADM 1
ADM 2
ADM 3
ADM 4
ADM 5
ADM 6
ADM 7
ADM 8
ADM 9
ADM 10
ADM 11
ADM 12
ADM 13
ADM 14
ADM 15
RESIZE_CS
RESIZE_RST
CGAFE_DT0
CGAFE_CLK
CAM_CG_CS
CGRST