3.5
Specifications of I/O Interfaces with External Devices
This section describes I/O interfaces between the QD73A1 and external devices.
3.5.1
Electrical specifications of I/O signals
This section describes electrical specifications of I/O interfaces between the QD73A1 and external devices.
(1) Input specifications
Signal name
Supply power
Input common
Servo READY signal (READY)
Stop signal (STOP)
Near-point dog signal (DOG)
Upper limit signal (FLS)
Lower limit signal (RLS)
Speed-position switching command
signal (CHANGE)
(Open collector method)
Phase-A feedback pulse (PULSE A)
Phase-B feedback pulse (PULSE B)
Phase-Z feedback pulse (PULSE Z)
(TTL method)
Phase-A feedback pulse (PULSE A)
Phase-B feedback pulse (PULSE B)
Phase-Z feedback pulse (PULSE Z)
(Differential output method)
Phase-A feedback pulse (PULSE A)
Phase-B feedback pulse (PULSE B)
Phase-Z feedback pulse (PULSE Z)
*1
The following table shows the pulse width and phase difference depending on pulse frequency.
Pulse frequency
Pulse width (duty ratio: 50%)
200kpulse/s or less
or more
1Mpulse/s or less
or more
40
Voltage
range/Current
consumption
5 to 24VDC/
Max.60mA
4.75 to 26.4VDC
10.8 to 14VDC
4.5 to 5.5VDC
5 s or more
2.5 s
2.5 s
or more
1 s or more
0.5 s
0.5 s
or more
ON
ON
voltage
current
3V or
2.5mA or
1V or lower
higher
higher
4V or
2.7mA or
1V or lower
higher
higher
2.8V or
0.8V or
higher
lower
EIA standard
RS-422-A differential line receiver
(Equivalent of AM26LS32 (Manufactured by Texas
Instruments Inc.))
Phase difference
Phase A
Phase B
1.25 s or more
Phase A
Phase B
0.25 s or more
OFF
OFF
voltage
current
0.1mA or
lower
200kpulse/s or
0.1mA or
lower
less
200kpulse/s or
less
1Mpulse/s or
less
When the phase A leads the
phase B, the positioning
address (current value)
increases.
Pulse
frequency
*1
*1
*1