(2) Output signal list
Output signal (CPU module QD73A1)
Device No.
Y10
Y11
Y12
Y13
Y14
Use prohibited
Y15
Y16
Y17
Y18
Y19
Zero/gain adjustment data writing request
Y1A
signal
Zero/gain adjustment change request
Y1B
signal
Y1C
Set value change request signal
Y1D
Y1E
Use prohibited
Y1F
If a "Use prohibited" area is turned on/off through a sequence program, the QD73A1's function cannot be guaranteed.
Signal name
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y2A
Y2B
Y2C
Y2D
Y2E
Y2F
Output signal (CPU module QD73A1)
Device No.
OPR start signal
Absolute positioning start signal
Forward start signal
Reverse start signal
Forward JOG start signal
Reverse JOG start signal
Speed-position mode restart signal
Stop signal
Error reset signal
Overflow reset signal
Underflow reset signal
Use prohibited
Speed-position switching enable signal
PLC READY signal
Use prohibited
CHAPTER 3 SPECIFICATIONS
Signal name
31
3