Toshiba V Series User Manual page 30

Chapter 4 Register Configuration
Status
CH1: [18W]
CH2: [82W]
4
Received bytes
CH1: [19W]
CH2: [83W]
Trailing code
CH1: [24W]
CH2: [88W]
Receive timeout
CH1: [25W]
CH2: [89W]
18
(8) Status information of each channel
Parameters 18W/82W contain the control signal status of each channel.
F E D C B
No use
(9) Receive byte length information of each channel
Parameters 19W/83W contain the received byte count.
F E D C B
(10)Trailing code information of each channel
Parameters 24W/88W contain the trailing code of the transmission text of each
channel.
This code can be rewritten with the WRITE instruction to change the trailing code.
F E D C B
No use
Trailing code: Set to 0DH by default during power on and cold start.
(11) Receive timeout information for each channel
Parameters 25W/89W contain the receive timeout interval between characters of the
received data. Receive timeout error occurs if the interval between received data
characters exceeds this timeout interval.
F E D C B
Receive timeout: 0.1 to 60 sec. (Setting: 1 - 600)）
Receive timeout is not checked if it is set to 0.
Receive timeout is set to 1 sec. (10) by default during power on and cold start.
A 9 8 7 6
IDL DSR
Bit Name
8 IDL 1: Transmision unit idle
0: Not idle
7 DSR 1: DSR enabled
0: DSR disabled
2 CTS 1: CTS enabled
0: CTS disabled
1 CD 1: CD enabled
0: CD disabled
Bit7 DSR signal is available only for Ch2.
Ch1 does not support DSR.
A 9 8 7 6
Received bytes (0 to 819 bytes)
A 9 8 7 6
A 9 8 7 6
Receive timeout
model 3000 ASCII Module (AS311) User's Manual
5 4 3 2 1
CTS CD
Description
5 4 3 2 1
5 4 3 2 1
Trailing code
5 4 3 2 1
0
0
0
0