Recorder Signal Processing - Canon MVX200 E Service Manual

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4-3 Recorder Signal Processing

IC2302
SDRAM
A DATA
IC1103
DIGIC
B DATA
DV
75Ω
DRIVE
AV JACK
S TERMINAL
CVF
LCD
LCD
< VIC4 >IC2301
• The VIC, MI-COM, DIF INTERFACE and VIDEO INTERFACE circuits are integrated on a single semiconductor chip.
• A/B DATA : Input in camera mode. B DATA is output and A DATA is input at playback. (DIGIC DV digital effect circuit is
used at playback.)
The video data and signals input to VIC4 are subjected to digital VCR format signal processing. Audio data,
subcode data and ITI data are also created at VIC4, and these signals are output to VRP2 as 41.85 Mbps data of
DV format.
• DIF
: After conversion to digital data conforming to IEEE1394 standard, the data is output at DV terminal. At digital
input, the data enters VIC4 signal processing circuit via the opposite route.
< VRP2 >IC2000
Recording data of 41.85 Mbps output from VIC4 is amplified at VRP2, and is recorded on magnetic tape while undergoing head
switching of CH-1, CH-2 with a switching pulse. At playback, the head output signal is amplified and sent to VIC4.
VIC BLOCK
SDRAM
INTERFACE
VIDEO
COMPRESSION
INTERFACE
/DEMOD.
D/A
A/D
BUS
MI-COM. BLOCK
R,G,B
FR MI-COM.
IC2301
VIC4
Fig. 10
MVX250i E, MVX200i E, MVX200 E
DIF BLOCK
DIF
INTERFACE
REC/PB
ECC
PROCESS
AUDIO
INTERFACE
Cache
CO-
1K Byte
processer
13
TECHNICAL DESCRIPTION
DV
TERMINAL
VIDEO
HEAD
IC2000
VRP2
IC801
AV
AIF4
JACK

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