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Pin
Port
Part Name & Description
No.
53
KI1(SOURCE)
Key return signal 1
54
REMO INT
Remote
interference
55
NC/WP/ACC
No Connection
56
NC/A21
No Connection
57
NC/A22
No Connection
58
FLASH CE
FLASH chip enable
59
LCD CS
LCD driver chip select
60
NC
No Connection
61
NC
No Connection
62
REMO 1
Remote control signal
63
NC
No Connection
64
VLCD CONT
VLCD 16V control
65
M W U REQ
MAIN-u-com wake up request
66
LED ON
P.LED control output
67
NC
No Connection
68
NC
No Connection
69
FLASH OE/ LCD
FLASH output enable and
RD
LCD driver lead strobe
70
LCD WR
LCD driver light strobe signal
71
FLASH WE
FLASH light enable signal
72
NC
No Connection
73
LCD RESET
LCD driver reset control
74
FLASH RY/BY
FLASH ready/busy input
75
/RST
System reset signal input
76
NC
No Connection
77
X1A
No Connection
78
X0A
Not used
79
VSS
Ground
80
X0
MAIN system clock input
(12.5MHz)
81
X1
MAIN system clock output
(12.5MHz)
82
VCC
Positive power supply
83
D0
FLASH D0/LCD D0
84
D1
FLASH D1/LCD D1
85
D2
FLASH D2/LCD D2
86
D3
FLASH D3/LCD D3
87
D4
FLASH D4/LCD D4
88
D5
FLASH D5/LCD D5
89
D6
FLASH D6/LCD D6
90
D7
FLASH D7/LCD D7
91
D8
FLASH D8
92
D9
FLASH D9
93
D10
FLASH D10
94
D11
FLASH D11
95
D12
FLASH D12
96
D13
FLASH D13
97
D14
FLASH D14
98
D15
FLASH D15
99
A16
FLASH A15
100 A17
FLASH A16
I/O
(V)
INT/I
0
control
signal
INT
3.7
O
0
O
0
O
0
O
3.4
O
3.4
-
-
-
-
I
3.7
-
-
O
3.4
O
0
O
3.4
-
-
-
-
O
3.4
O
3.4
O
3.4
-
-
O
3.4
I
3.4
I
3.5
-
-
-
-
I
0
-
0
I
1.3
O
1.5
-
3.5
I
0.9
I
0.9
I
1.1
I
0.9
I
1.0
I
1.1
I
1.1
I
0.8
I/O
0.9
I/O
0.9
I/O
0.9
I/O
0.8
I/O
0.8
I/O
0.7
I/O
0.7
I/O
0.7
O
3.0
O
1.7
11.3. CD Servo Block
IC401 : YESAM275
Pin
Port
No.
1
CVSS1
GND
2
A22
TP407
3
CVSS2
GND
4
DVDD1
I/O system (3.3V) power supply
5
A10
Address bus of FLASH ROM
6
-
7
A11
Address bus of FLASH ROM
8
A12
9
A13
10
A14
11
A15
12
/CVDD1
CORE CPU system (1.6V) power
supply
13
-
14
DVSS1
GND
15
CVSS3
GND
16
/CVDD2
I/O system (3.3V) power supply
17
-
18
-
19
READY
20
/PS
FLASH ROM selection signal
21
-
22
-
23
R/W
Lead/light signal to FLASH ROM
24
/MSTRB
Memory access signal
25
-
26
/MSC
27
MUTE
Mute signal output (H:Mute on)
28
-
29
-
30
/HOLD
31
BIO
SUBO input
32
MP/MC
Operation mode setting (external pull-
up)
33
DVDD2
I/O system (3.3V) power supply
34
CVSS4
GND
35
BD R1
GND
36
-
37
CVSS5
GND
38
-
39
-
40
DVSS2
GND
41
CLK C M AUDIO bit clock input
42
SCK
Clock input
43
LRCK
C
AUDIO L/R identifying signal input
M
44
CDFS
Serial frame sink signal input
45
DATA
AUDIO serial data input
CM
46
-
47
SI
Serial data input
48
CLK M C AUDIO bit clock output
49
SCK
Clock input
50
CVSS6
GND
51
-
52
CVDD3
CORE CPU system (1.6V) power
supply
53
LRCK M
AUDIO L/R identifying signal output
C
54
CDFS
Serial frame sink signal input
55
-
56
DVDD3
I/O system (3.3V) power supply
57
DVSS3
GND
58
REST
Mechanics deck REST SW input
SW
15
CQ-C8401W / CQ-C7401W
Descriptions
I/O
-
-
-
-
O
-
-
O
O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
O
-
-
-
-
O
O
-
-
-
-
O
-
-
-
-
-
-
I
I
-
-
I
-
-
-
-
-
-
-
-
I
I
I
I
I
-
-
I
O
I
-
-
-
-
O
I
-
-
-
-
I
(V)
0
0
0
3.1
3.1
-
0
3.1
3.1
3.1
0
1.6
-
0
0
1.6
-
-
3.1
3.1
-
-
3.1
3.1
-
3.1
0
-
-
3.1
0
3.1
3.1
0
0
-
0
-
-
0
1.6
3.0
1.6
2.4
1.6
-
0
1.6
3.0
0
-
1.6
1.5
2.4
-
3.1
0
3.1
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