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How To Use A/D Converter For S6J3110/ S6J3120 Series
This application note describes an example of setting for basic A/D Converter function and Range Compare function
in the S6J3110 / S6J3120 Series.
Contents
1 Introduction .................................................................. 1
1.1 About This Document ........................................... 1
2 Target Products ........................................................... 1
3 Overview ...................................................................... 2
3.1 A/D Compare Activation ....................................... 2
3.2 A/D Activation Arbitration Functions ..................... 3
3.3 A/D Converter Control Functions .......................... 3
3.4 Configuration ........................................................ 4
3.5 A/D Converter Setting ........................................... 7
4 Registers .................................................................... 20
4.1 Analog Input Control Register (ADER) ............... 20
4.2 A/D Mode Setting Register (ADMD) ................... 20
(ADTECS) ........................................................... 20
(ADTCS) ............................................................. 21
4.5
Register (ADTCSC)..................................21
1
Introduction
1.1
About This Document
This application note is intended for persons who are considering the use of Traveo family S6J3110 / S6J3120 series.
This application note describes an example of setting for basic A/D Converter function and Range Compare function
in the S6J3110 / S6J3120 Series.
2
Target Products
Products of what is described in this operation manual are as follows.
Series
S6J3110
S6J3120
www.cypress.com
Product Number (Not Included Package Suffix）
S6J3118, S6J3119, S6J311A, S6J311B, S6J311C, S6J311D, S6J311E
S6J3128, S6J3129, S6J312A
Document No. 002-04457 Rev. *B
Target Products: Refer to Section 2
4.6
Range Comparison Control Status Register
(ADRCCS).............................................. 22
4.7
4.8
Lower Threshold Setting Register (ADRCLT) ... 22
4.9
A/D Software Activation Channel Selection
Register (ADTSE) ............................................. 23
4.10 A/D Software Activation Register (ADTSS) ....... 23
4.11 A/D Data Register (ADTCD) ............................. 23
4.13 Range Comparison Flag Clear Register
(ADRCIFC) ....................................................... 24
5 Reference .................................................................. 25
Document History ............................................................ 26
Worldwide Sales and Design Support ............................. 27
Products .......................................................................... 27
®
Solutions ............................................................. 27
Cypress Developer Community....................................... 27
Technical Support ........................................................... 27
AN204457
1
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Table of Contents
Related Manuals for Cypress S6J3110 Series
Summary of Contents for Cypress S6J3110 Series
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Page 1: Table Of Contents
Products ................27 4.4 A/D Activation Trigger Control Status Register ® PSoC Solutions ............. 27 (ADTCS) ............. 21 Cypress Developer Community........27 A/D Activation Trigger Control Status Clear Register (ADTCSC)…………………………….21 Technical Support ............27 Introduction About This Document This application note is intended for persons who are considering the use of Traveo family S6J3110 / S6J3120 series. -
Page 2: Overview
For each A/D data register, the data protection function can be set. The protection function is effective for factors that are not compare match activation. When the data protection function is enabled, the A/D activation request is masked until data is read from the A/D data register and the interrupt flag is cleared. www.cypress.com Document No. 002-04457 Rev. *B... -
Page 3: A/D Activation Arbitration Functions
If the A/D conversion cancellation signal is received during A/D conversion, the current processing is stopped and initialized. (Forcible stop function) For setting the sampling time, the sampling time setting that is common to all the channels or sampling time setting for each channel can be selected. www.cypress.com Document No. 002-04457 Rev. *B... -
Page 4: Configuration
C o n f i g u r a t i o n o f t h e A/ D Ac t i va t i o n C o m p a r e The configuration of the A/D activation compares shows in the following. Figure 1. Configuration of the A/D Activation Compare (n=31, A/D Converter Unit 0) www.cypress.com Document No. 002-04457 Rev. *B... - Page 5 C o n f i g u r a t i o n o f t h e A/ D Ac t i va t i o n Ar b i t r a t i o n The configuration of the A/D activation arbitration shows in the following. Figure 2. Configuration of the A/D Activation Arbitration www.cypress.com Document No. 002-04457 Rev. *B...
- Page 6 C o n f i g u r a t i o n o f t h e 1 2 - B i t A/ D C o n ve r t e r C o n t r o l The configuration of the A/D Converter Control shows in the following. Figure 3. Configuration of the 12-Bit A/D Converter Control (n=32, A/D Converter Unit 0) www.cypress.com Document No. 002-04457 Rev. *B...
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Page 7: A/D Converter Setting
A/D Converter setting start Interrupt setting Analog input enable setting A/D Converter time setting - A/D Converter end interrupt setting -Range Comparison interrupt setting Activation channel and factor setting Range comparison function setting A/D Converter Start setting www.cypress.com Document No. 002-04457 Rev. *B... - Page 8 A/D Converter mode Repeat conversion A/D Converter protection Disable A/D Conversion Completion interrupt Enable A/D Range Comparison function Enable A/D Range Comparison interrupt Enable Each item (Figure 4) of the setting flow describes in the following. www.cypress.com Document No. 002-04457 Rev. *B...
- Page 9 S6J3120 Series Hardware Manual.) This application note setting is AN14 in the analog input pin. Figure 5. Analog Input Enable Setting Flow Analog inputs enable setting ADER register key code setting Analog input pin setting (AN14) ADER_ADER0=0x00004000 www.cypress.com Document No. 002-04457 Rev. *B...
- Page 10 Common sampling time setting to all channels ADC0_ADMD0_STPCEN=0 Sampling time setting (48 peripheral clock cycles:1.3µs* ) ADC0_ADMD0_ST=3 Compare time setting (28 peripheral clock cycles:0.8µs* ) ADC0_ADMD0_CT=0 Note: * When the peripheral clock is 36MHz operation on S6J311E. www.cypress.com Document No. 002-04457 Rev. *B...
- Page 11 Data Register Protection Enable Bit sets disable. These settings are in the ADTCS register. The Activation channel and factor settings flow shows in the following. Figure 7. A/D Converter Activation Channel and Factor Setting Flow www.cypress.com Document No. 002-04457 Rev. *B...
- Page 12 ←A/D activation factor setting ADC0_ADTCS0_STS=0; ADC0_ADTECS0_STS2=0; // A/D Interrupt request disable ←A/D Interrupt request disable ADC0_ADTCS0_INTE=0; //Repeat conversion ←Repeat conversion mode setting ADC0_ADTCS0_RPT=1; // A/D data register protection disable ←A/D data register protection disable ADC0_ADTCS0_PRT=0; www.cypress.com Document No. 002-04457 Rev. *B...
- Page 13 ADRCLT0: C [11-0] =0x555 Upper and Lower Threshold Selection ADRCCS0: RCOTS [1-0] =1 Inside/outside-Range Check Selection ADRCCS0: RCOIRS=1 Range Comparison Interrupt Request Enable ADRCCS0: RCOIE=1 Continuous Detection Count Specification setting ADRCCS0: RCOCD [2-0] =1 www.cypress.com Document No. 002-04457 Rev. *B...
- Page 14 Register (ADTSE). And, the Interrupt request enables bit sets in the A/D Activation Trigger Control Status Register (ADTCS). Then, the A/D converter function activates by the START bit in the A/D Software Activation Register (ADTSS). The A/D converter start setting flow shows in the following. www.cypress.com Document No. 002-04457 Rev. *B...
- Page 15 AD_Start(void) ←A/D software activation channel enable setting // A/D software activation channel enable ADC0_ADTSE0_ADT0=1; ←A/D Interrupt Request enables setting // A/D Interrupt request enable ADC0_ADTCS0_INTE=1; // A/D conversion activation ←A/D Converter activation ADC0_ADTSS0_START=1; www.cypress.com Document No. 002-04457 Rev. *B...
- Page 16 Figure 14. A/D Converter End Interrupt Routine Setting Program // A/D Converter end interrupt routine FN_IRQ_DEFINE_BEGIN(Adc_Isr_Adc0_EndOfConversion, INTERRUPTS_IRQ_NUMBER_396) // A/D data get ←A/D Conversion Data read AD_data=ADC0_ADTCD0_D; // A/D interrupt request flag clear ←A/D Converter interrupt request flag clear ADC0_ADTCSC0_INTC=1; FN_IRQ_DEFINE_END() www.cypress.com Document No. 002-04457 Rev. *B...
- Page 17 The sample program shows in the following. Figure 16. Range Comparison Interrupt Routine Setting Program // A/D Range compare detection interrupt routine FN_IRQ_DEFINE_BEGIN(Adc_Isr_Adc0_RangeCompare, INTERRUPTS_IRQ_NUMBER_397) // A/D Range comparison interrupt factor flag clear ADC0_ADRCIFC0_RCINTC0=1; ←Range comparison interrupt factor flag FN_IRQ_DEFINE_END() clear www.cypress.com Document No. 002-04457 Rev. *B...
- Page 18 -A/D conversion result “1”, “4”,”5” are detected by setting of the inside range threshold. -A/D conversion result “2”, “3”,”6” are detected by setting of the outside range threshold. These detection operations show Table2 in the following. Figure 17. Range Comparison Operation www.cypress.com Document No. 002-04457 Rev. *B...
- Page 19 (ADRCIF.RCINT) is set to "1". If range comparison result comes to be "not detected" even once during continuous detection, the continuous detection measurement is cleared to 0 times and the measurement is performed again. www.cypress.com Document No. 002-04457 Rev. *B...
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Page 20: Registers
Table 5. A/D Activation Trigger Extended Control Register Example of Settings Setting register Bit name Description Value Contents － 15-9 Reserved Reserved STS2 A/D activation Factor Selection Bits Software activation － Reserved Reserved CHSEL[4-0] Analog Channel Selection Bits Channel 14 www.cypress.com Document No. 002-04457 Rev. *B... -
Page 21: A/D Activation Trigger Control Status Register (Adtcs)
Table 7. A/D Activation Trigger Control Status Clear Register Example of Settings Setting register Bit name Description Value Contents Clear the ADTCS BUSYC BUSY Clear Bit Register BUSY bit. Clear the ADTCS INTC INT Clear Bit Register INT bit. － Reserved Reserved 13-0 www.cypress.com Document No. 002-04457 Rev. *B... -
Page 22: Upper Threshold Setting Register (Adrcut)
Table 10. Lower Threshold Setting Register Example of Settings Setting register Bit name Description Value Contents － 15-12 Reserved Reserved 11-0 C[11-0] Lower Threshold Bits 0x555 (*) Lower Threshold Note: *This lower threshold value is example. www.cypress.com Document No. 002-04457 Rev. *B... -
Page 23: A/D Software Activation Channel Selection Register (Adtse)
ERRST results (0) or new data (1) (Only if ERR=1) by overwritten. － － 13-12 Reserved Reserved 11-0 D[11-0] A/D Data Bits 0－0xFFF Conversion data Note: These ERR, ERRST, D [11-0] bit are read-only. www.cypress.com Document No. 002-04457 Rev. *B... -
Page 24: Range Comparison Flag Register (Adrcif)
The Range Comparison Flag Clear Register (ADRCIFC) clears the bits in the range comparison flag register. Table 15. Range Comparison Flag Clear Register Example of Settings Setting register Bit name Description Value Contents Clear the ADRCIF 31-0 RCINTC[31-0] RCINT Clear Bits Register RCINT bit www.cypress.com Document No. 002-04457 Rev. *B... -
Page 25: Reference
How to Use A/D Converter for S6J3110/ S6J3120 Series Reference [1]. 32-BIT MICROCONTROLLER Cypress Traveo Family S6J3110 series HARDWARE MANUAL [2]. 32-BIT MICROCONTROLLER Cypress Traveo Family S6J3120 series HARDWARE MANUAL www.cypress.com Document No. 002-04457 Rev. *B... -
Page 26: Document History
Document Number: 002-04457 Revision Orig. of Submission Description of Change Change Date KHAS 07/31/2015 Initial release Converted Spansion Application Note “S6J3110_AN708-00015” to Cypress 5058934 KHAS 03/15/2016 format 5876001 AESATMP8 09/07/2017 Updated logo and Copyright. www.cypress.com Document No. 002-04457 Rev. *B... -
Page 27: Worldwide Sales And Design Support
Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.
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