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A4.0
IMU PRIORITY STRUCTURE
Arbitrator
logic)
provides
the
priority management
internal
buses
of
the
IMU.
For
background
information,
the
foilowing
fiescriues
he
Letai
EMU
prieritu
struature.
However,
item 6
is
the
only
variable
of
interest
or
concern;
i.e.,
the
only
item
relevent
to
properly
configuring
channel
priorities.
IMU
Central
(the
Bus
function
for
the
two
1.
Functional
Control
logic
"high
priority
request"
(highest).
2.
SCU
Port
Adapter
A.
3.
SCU
Port
Adapter
8.
4.
SCU
Port
Adapter
C.
5.
SCU
Port
Adapter
D.
6.
Peripheral
subsystem
adapters;
16
physical
(channel)
adapters,
8 on
each
of
the
two
internal
buses.
Bus
0
(physical
channels
0-7)
and
Bus
1
(physical
channels
8~15)
have
equal
priority.
Channel
Adapter
priority
alternates
between
buses."
Physical
adapter
0
on
Bus
0,
or
8
on
Bus
1
-
highest
priority."
Physical
adapter
7
on
Bus
0,
or
15
on
Bus
1
-
lowest
priority."
7.
After
all
the
above
adapters
are
serviced,
a
Functional
Control
logic
low priority
request
is
next.
a.
MCA
(lowest).
services
priorities
by
EQUAL
PRIORITY
internal
request
on
the
bus
it
is
hardware
is
designed
numbers
0-7
and
Bus
1
following
simplistic
"
lMU
Central
(the
Bus
Arbitrator
logic)
alternating
(ping
ponging)
between
the
two
buses
and
servicing
the
highest
priority
currently
sensing.
As mentioned
earlier,
the
such
that
Bus
0
contains
physical
channel
contains physical
channel
numbers
8~15.
The
cases
are
intended
only
to
illustrate
this
idea.
request
following
For
example,
if
every
physical
adapter
had
one
service
outstanding
at
the
same
time,
they might
be
serviced
in
the
order;
i.e.,
alternating between Bus
0 and Bus
1:
0,
8;
1,
9;
2,
10;
3,
11;
4,
12;
5,
13;
6,
14;
7.
15.
Another
example;
if
0,
4,
10,
11,
and
15
all
request
service
at
the
same
time,
they would
be
serviced
in
the
following
order.
Note
that
after
the
hardware
finishes
a
request
on
one
of
the
buses,
it
will
process
a
request
waiting
on
the
other
bus
next.
0.
10. 4,
11,
15.
APPENDIX A
REV 8
With
the
bus
alternation
aspect
of
the
priority
algorithm,
a
higher
numbered
physical
adapterfiPC
on
Bus
1
could
be
serviced
before
a
lower
numbered
physical
adapter/190
on
Bus
0
if
both
requested
service
simultaneously.
However,
the
EMU
design
recognizes
the
critical
nature
of
PTW and
DCW
fetches
(i.e.,
Taiiy
Run-Out
conditions)
for
nonbuffered
physical
channel
adapters
and
sevices
them
differently.
The
design
assumes
that
nonbuffered channels
are configured
as
high
priority
channels;
i.e.,
within
the
set
of
numbers
0,
1,
2,
3,
8,
9,
10,
11.
PTW and
DCW
fetch
requests
for
these
channels
are
accumulated
in
a
queue
and
are
serviced
(in
a
FIFO manner),
before
any
other
accumulated
PTW or
DCW
requests
are
serviced
for
the
remaining
lower
priority
channel
numbers
4-7
and
12-15
(accumulated
in
a
separate
FIFO
queue).
A4.1
PRIORITY GUIDELINES
58010048
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