Sony HK-PSU02 Installation Manual page 27

D13 (G1) : DLKD status LED
Lights when the DLL of the FPGA is locked.
If this LED does not light, the FPGA may be defective.
D14 (G1) : RCB DONE status LED
Lights when the FPGA configuration is completed.
D15 (G1) : SYSTEM status LED
Lights when the system configuration and FPGA reset are
completed.
If this LED does not light, the FPGA may be defective.
ND1 (E1), ND2 (E2) : STATUS A LED
Indicates status of the VIF-32 board CPU.
<Switches>
S1 (D1) : CPU CONFIG A switch
Used for maintenance.
S2 (D1) : SETUP switch
Used for maintenance.
<Connectors>
CN3 (C1) : COM A terminal
Connected to the SUB CPU control terminal during
maintenance.
RS-232C interface compliant.
CN4 (C1) : USB terminal
Used for maintenance.
CN5 (H1) : ISP common connector
Used for writing a program in the JTAG device with ISP in
the production process.
<Test terminals>
E1 (B1), E2 (E1), E3 (H1) : GND terminals
Used as ground terminals when measuring voltages on the
check terminals.
TP1 (G1) : + + + + + 3.3 V check terminal
+3.3 V measuring terminal.
TP2 (E1) : + + + + + 12 V check terminal
+12 V measuring terminal.
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MVE-8000A