Fast Ethernet Connector Signals - Cisco 7000 Series Hardware Installation And Maintenance Manual

Fast Ethernet Connector Signals

Fast Ethernet Connector Signals
The two connectors on the FEIP are a single MII, 40-pin, D-shell type, and a single RJ-45. You can
use either one or the other. Only one connector can be used at one time. Each connection supports
IEEE 802.3u interfaces compliant with the 100BaseX and 100BaseT standards. The RJ-45
connection does not require an external transceiver; however, the MII connection does.
The RJ-45 modular connector has strain-relief functionality incorporated into the design of its
standard plastic connector.Table A-4 and Table A-5 list the pinouts and signals for the RJ-45 and
MII connectors.
Table A-4
Pin
1
2
3
6
Note
be used for the unused Category 5, UTP cable pairs 4/5 and 7/8. Common-mode termination reduces
the contributions to electromagnetic interference (EMI) and susceptibility to common-mode
sources. Wire pairs 4/5 and 7/8 are actively terminated in the RJ-45, 100BaseTX port circuitry in the
FEIP port adapter.
Table A-5
Pin
14–17
12
11
13
3
4–7
9
10
8
18
19
2
22–39
1, 20, 21, 40
1. Any pins not indicated are not used.
2. Tx_CLK and Rx_CLK are provided by the external transceiver.
A-4 Cisco 7010 Hardware Installation and Maintenance
FEIP Port Adapter RJ-45 Connector Pinout
Description
Receive Data + (RxD+)
RxD–
Transmit Data + (TxD+)
TxD–
Referring to the RJ-45 pinout in Table A-4, proper common-mode line terminations should
FEIP Port Adapter MII Connector Pinout
1
In Out
– Yes
Yes –
– Yes
– Yes
– Yes
Yes –
Yes –
Yes –
Yes –
Yes –
Yes –
– –
– –
– –
I/O Description
– Transmit Data (TxD)
– Transmit Clock (Tx_CLK)
– Transmit Error (Tx_ER)
– Transmit Enable (Tx_EN)
– MII Data Clock (MDC)
– Receive Data (RxD)
– Receive Clock (Rx_CLK)
– Receive Error (Rx_ER)
– Receive Data Valid (Rx_DV)
– Collision (COL)
– Carrier Sense (CRS)
Yes MII Data Input/Output (MDIO)
– Common (ground)
– +5.0 volts (V)
2