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The result after subtraction.
The most significant half of the product after multiplication.
The most significant half of the dividend before division.
The quotient after division.
The most significant half of a double wordafter the execution of all double length instructions.
The word to be shifted during various shift instructions.
The word transferred to o r from memory o r another register o r to be modified in some way
during the execution of various data transfer instructions.
The word on which tests a r e performed during the execution of branch instructions.
Q
Register
The Q register is a 20-bit register which holds the multiplier during multiplication and the
remainder after division and a c t s with the
A
register to form a 38-bit (plus a sign bit) accumulator
during the execution of double word operations.
When double word instructions a r e used, the
least significant half of the double word i s automatically transferred into the Q register through
the
A
register. Briefly, the functions of the
Q
register a r e :
Holds the multiplier during multiplication.
Holds the least significant half of the product after multiplication.
Holds the least significant half of the dividend before division.
Holds the remainder after division.
Holds the least significant half of a double word after the execution of all double length
instructions.
Shifts in conjunction with the
N
and
A
registers in special shift instructions.
N Register
The
N
register i s a 6-bit register which i s used a s a single character (BCD) buffer between the
computer and the typewriter and the perforated paper tape reader and punch. Information
is
transferred directly between the
N
register and the
A
register.
I Register
The I register i s the instruction register.
It contains the 20 bits of an instruction word during
execution of a computer command.
While instructions a r e being processed, bits 0 through
4
indicate the operation to be performed and bits 5 and 6 control the indexing of instructions when
specified by the program.
During the execution of instructions involving reading an operand
from memory (and after appropriate indexing has taken place), bits 5 through 19 contain the
memory location of the operand.
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