LG CED-8042B Manual page 18

IC209 (RL5E808B)
Block Diagram
DEFS
DSFS
SUBIN
SUBCK
LRCKIN
SDIN
BTCK
C2PO
ESFS
EEFS
WGATE
HFSW
PANICIN
EFM1
EFM2
EFMNT1-4
E11TP
E11TS
RESMP
ROPC1
ROPC2
VCOIN
CPOUT
CLKIN
(33.8688MHz)
TON
DEFS
DPLOCK
MPWM
DMCON
MON
FGIN
REVDET
SBRK
WBLIN
ATIPIO
ATIPCK
ASYNC
Subcode Subcode
if Operator
CD-DA if
CIRC
RAM if
Encoder
CD
Encoder
34.5744MHZ
PLLCK
Clock
Synthesizer
Clock
Generator
Motor
Speed
Controller
ATIP
Decoder
Buffer
Manager
Sector
Processor
XCK
RD[15:0]
ROEB
RCAS0B
RCAS1B:RWE1B
RWE0B
DRAM if
RRAS0B
RA11:RRAS1B
RA10:RRAS2B
RA9:RRAS3B
RA[8:0]
DASPB
CS3FXB
CS1FXB
DA2
DA0
DIAGB
DA1
ATAPI if
IOCS16B
DINT
DACKB
DIORDY
DIORB
DIOWB
DREQ
DD[15:0]
DRSTB
SAD[7:0]
SALE
SA[15:0]
SRDY
SysCon if
SWEB
SREB
CS0B
CS1B
SINT0
SINT1
SRESB
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