6.2 Block Diagram - Baseband
I/O CONNECTOR
1
DGND
2
CHG
3
GEN I/O
4
POWER OUT
5
RX (IN)
6
TX (OUT)
7
ACC ID
8
RTS
9
CTS
10
AUDIO OUT
11
AUDIO IN
12
AGND
Battery
Connector
LI-ION
BATTERY
RTC / ID
SIM
Connector
SIM CARD
6.2.1 General Baseband Indications
The Baseband part consists of two chips, a digital chip IC 1 and an analog one IC 2.
The CMD-J5/J16 external memory size is 32 Mbits Flash ROM and 4 Mbit SRAM.
IC 1
The application of IC 1 is the management of the GSM baseband processes through the GSM layer 1, 2 and 3
protocols as described in the ETSI standard with a specific attention to the power consumption in both GSM
dedicated and idle modes.
It is a chip that implements:
the digital baseband processes of the CMD-J5/J16 and combines a Digital Signal Processing (DSP) with its
program and data memories,
a Micro-Controller core with emulation facilities and an internal RAM memory,
a clock squarer cell,
several compiled ports and equivalent CMOS gates.
Full support for Full-Rate, Enhanced Full-Rate and Half-Rate speech coding is given.
MCP-I/F
FLASH/SRAM
LCD-I/F
LCD
MODEM-I/F
TIME
PROCCESSING
UNIT
RTC
SIM
Interface
Power / CHG
Management
SIM I/F
HFK I/F
SIM LEVEL
CTRL 3V/5V
A/D CONV
BL-I/F
KEY-I/F
IC 1
JOG-I/F
AUDIO
AMP
32kHz
CLK-
RF-I/F
CTRL
IC 2
I/F
IC 1
I/F
AUDIO
I/F
IC 2
RF I/F
A/D, D/A
TCXO
RF
BLOCK
18
KEY-LED
LCD-LED
KEY-MATRIX
FLEX-BOARD
SLIDE-SW
(REC/LOCK
or Manner)
KEYBOARD
JOG DIAL
JOG
Multiactor
*Ringer
RINGER
*Vibrator
*Loud-
Speaker
HEADSET
AUDIO &
HEADPHONE-JACK
REMOTE
MIC
AUDIO
EAR
AMP
RECEIVER
MIC