Altera Stratix IV Device Handbook page 42

2–6
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a shared arithmetic
chain, and a register chain. Through these dedicated resources, an ALM can efficiently
implement various arithmetic functions and shift registers. Each ALM drives all types
of interconnects: local, row, column, carry chain, shared arithmetic chain, register
chain, and direct link.
ALM.
Figure 2–5. High-Level Block Diagram of the Stratix IV ALM
shared_arith_in
Combinational/Memory ALUT0
dataf0
datae0
dataa
datab
datac
datad
datae1
dataf1
Combinational/Memory ALUT1
shared_arith_out
Stratix IV Device Handbook
Volume 1
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
Figure 2–5
carry_in
6-Input LUT
adder0
adder1
6-Input LUT
carry_out
shows a high-level block diagram of the Stratix IV
reg_chain_in
labclk
D Q
reg0
D Q
reg1
reg_chain_out
Adaptive Logic Modules
To general or
local routing
To general or
local routing
To general or
local routing
To general or
local routing
February 2011 Altera Corporation