Pch-Io Configuration - Asus E500 G5 SFF User Manual

PEG2 Physical Slot Number [3]
Allows you to set the physical slot number attached to this Port. The number has to be
globally unique within the chassis. Use the <+> or <-> to adjust the value. The values
range from 0 to 8191.
PEG3 Slot Power Limit Value [75]
Set the upper limit on power supplied by slot. Use the <+> or <-> to adjust the value.
The values range from 0 to 255.
PEG3 Slot Power Limit Scale [1.0x]
Allows you to select the scale for the Slot Power Limit Value.
Configuration options: [1.0x] [0.1x] [0.01x] [0.001x]
PEG3 Physical Slot Number [3]
Allows you to set the physical slot number attached to this Port. The number has to be
globally unique within the chassis. Use the <+> or <-> to adjust the value. The values
range from 0 to 8191.
VT-d [Enabled]
Allows you to enable or disable VT-d capability.
Configuration options: [Disabled] [Enabled]
CRID Support [Disabled]
Allows you to enable or disable CRID control for Intel SIPP.
Configuration options: [Disabled] [Enabled]
Above 4GB MMIO BIOS Assignment [Disabled]
Allows you to enable or disable above 4 GB memory mapped IO BIOS assignment. This is
enabled automatically if the aperture size is set to 2048MB.
Configuration options: [Disabled] [Enabled]
The following item is configurable only when you set VT-d to [Enabled].
X2APIC Opt Out [Disabled]
Allows you to enable or disable X2APIC Opt Out.
Configuration options: [Disabled] [Enabled]
4.5.2

PCH-IO Configuration

ASUS ESC510 G4 SFF
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