HP E1328A User Manual page 62

ER*: (Error (not) - bit 6). A zero (0) in this field indicates that an error has
occurred in executing a command. The error condition is cleared on receipt
of another command. The recommended way of clearing the error
condition is by sending the NULL command. Channel output operations
have no effect on this bit.
DON: (Done - bit 7). A one (1) this field indicates that the previous
)
command has been completed. Writing to the Command Register (08
16
when this bit is zero (0) may abort the command in progress. Channel
output operations have no effect on this bit.
S1 through S4: (Settle Flags - bits 8 to 11). A one (1) in one of these
fields indicates that the corresponding channel output is stable. A zero (0)
indicates that the channel output is or will be changing. Writing to a
channel when its settle flag is low (0) could corrupt the output data.
SR: (Soft Reset - bit 0). Writing a one (1) causes the D/A Converter to
enter a reset state. Channel output data will be lost and all pending
commands will be terminated. Registers 08 through 1E cannot be
16 16
accessed when Soft Reset is set. The D/A Converter will be held in the
reset condition until a zero (0) is written to the SR bit, at which time the
power-on self test and start-up sequence will be executed. It is
recommended that the SR bit remain high for >200 msec.
CAUTION
Only perform a soft reset if the "RESTART" command fails (see "Command
and Parameter Registers" later in this appendix). This is because when the
D/A Converter is soft reset, power is removed from the output channels, and
the output state during power-down is indeterminate.
SFI: (SysFail Inhibit - bit 1). Writing a one (1) inhibits the assertion of the
SYSFAIL line on the backplane.
62 HP E1328A Register-Based Programming Appendix B