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PROCESSOR/ POWER2
Sandy Bridge Processor 5/7
layout? check
V G F X _C OR E
A ll VAXG = 33A
C 39 1
C 3 92
C 3 69
C 3 8 8
2 2 u_ 6 . 3 V _ X5 R _0 8
2 2 u _6 . 3 V _ X 5R _ 08
*2 2u _ 6 . 3 V _X 5 R _ 0 8
22 u _ 6. 3V _ X 5 R _ 0 8
C 38 6
C 3 76
C 3 74
C 3 1 7
2 2 u_ 6 . 3 V _ X5 R _0 8
2 2 u _6 . 3 V _ X 5R _ 08
22 u _ 6. 3 V _ X 5 R _ 08
22 u _ 6. 3V _ X 5 R _ 0 8
C 31 5
C 3 14
C 3 18
C 37 3
+
+
* 33 0 U _ 2 . 5 V _D 2 _D
* 2 2u _ 6 . 3V _X 5 R _ 0 8
2 2 u_ 6 . 3 V _ X5 R _0 8
5 6 0 u_ 2 . 5 V _ 6. 6 * 6. 6 *5 . 9
C 38 9
C 3 9 0
C 3 22
2 2 u_ 6 . 3 V _ X5 R _0 8
2 2u _ 6 . 3V _X 5 R _ 0 8
2 2 u _ 6. 3 V _ X 5R _ 08
1 . 8 V S
All VCCPLL = 1.2A
C 4 5 8
C 3 1 6
+
3 3 0 uF _2 .5 V _ 9 m_ 6 . 3 *6
10 u _ 6. 3 V _ X 5 R _ 0 6
POWER
U 34 G
A T 2 4
A K 3 5
V A X G1
V A X G _S E N S E
A T 2 3
A K 3 4
A T 2 1
V A X G2
V S S A X G _S E N S E
C 3 87
V A X G3
A T 2 0
A T 1 8
V A X G4
2 2 u _6 . 3 V _ X 5R _ 08
V A X G5
A T 1 7
A R 2 4
V A X G6
V A X G7
A R 2 3
A R 2 1
V A X G8
V A X G9
A R 2 0
A R 1 8
V A X G1 0
C 3 77
V A X G1 1
A R 1 7
A P 2 4
V A X G1 2
A L1
2 2 u _6 . 3 V _ X 5R _ 08
V A X G1 3
S M _ V R E F
A P 2 3
V A X G1 4
A P 2 1
V A X G1 5
A P 2 0
V A X G1 6
A P 1 8
V A X G1 7
A P 1 7
V A X G1 8
A N 2 4
V A X G1 9
A N 2 3
V A X G2 0
A N 2 1
A N 2 0
V A X G2 1
V A X G2 2
A N 1 8
A N 1 7
V A X G2 3
V A X G2 4
A M2 4
A F 7
A M2 3
V A X G2 5
V D D Q 1
A F 4
V A X G2 6
V D D Q 2
A M2 1
A F 1
A M2 0
V A X G2 7
V D D Q 3
A C 7
V A X G2 8
V D D Q 4
A M1 8
A C 4
A M1 7
V A X G2 9
V D D Q 5
A C 1
V A X G3 0
V D D Q 6
A L 2 4
Y 7
V A X G3 1
V D D Q 7
A L 2 3
Y 4
V A X G3 2
V D D Q 8
A L 2 1
Y 1
V A X G3 3
V D D Q 9
A L 2 0
U 7
V A X G3 4
V D D Q 1 0
A L 1 8
U 4
V A X G3 5
V D D Q 1 1
A L 1 7
U 1
V A X G3 6
V D D Q 1 2
A K 2 4
P 7
V A X G3 7
V D D Q 1 3
A K 2 3
P 4
V A X G3 8
V D D Q 1 4
A K 2 1
P 1
V A X G3 9
V D D Q 1 5
A K 2 0
A K 1 8
V A X G4 0
V A X G4 1
A K 1 7
A J 2 4
V A X G4 2
V A X G4 3
A J 2 3
A J 2 1
V A X G4 4
V A X G4 5
A J 2 0
A J 1 8
V A X G4 6
V A X G4 7
A J 1 7
A H 2 4
V A X G4 8
V A X G4 9
A H 2 3
V A X G5 0
A H 2 1
M2 7
V A X G5 1
V C C S A 1
A H 2 0
M2 6
V A X G5 2
V C C S A 2
A H 1 8
L2 6
V A X G5 3
V C C S A 3
A H 1 7
J2 6
V A X G5 4
V C C S A 4
J2 5
V C C S A 5
J2 4
V C C S A 6
H 2 6
V C C S A 7
H 2 5
V C C S A 8
B 6
H 2 3
V C C P L L 1
V C C S A _S E N S E
A 6
A 2
V C C P L L 2
C 3 1 9
C 3 20
V C C P L L 3
1 u_ 6 . 3 V _ X5 R _ 0 4
1 u _ 6. 3V _ X 5 R _ 0 4
C 2 2
F C _C 2 2
C 2 4
V C C S A _ V I D 1
P Z 9 8 8 27 -3 6 4B -01 F
( GRAPHICS POWER )
V C C _ GT _ S E N S E 3 7
Q1 5
V S S _ G T_ S E N S E 3 7
*A O 3 40 2 L
V _S M _ V R E F
S
D
R 1 1 4
*1 0 0K _1 % _ 04
11/03
C5 8 6
* 0 . 1u _ 1 0V _ X 7 R _ 0 4
V _ S M _ V R E F
0 _0 4
R 1 16
V _ S M _V R E F _ C N T
C AD Not e: +V _SM_VR EF sh ould
h ave 10 mil trace width
layout? check
All VDDQ = 12A
C 6 0
C 6 7
C 63
C 6 5
C 5 8
1 0u _ 6 . 3V _X 5 R _ 0 6
10 u _ 6. 3 V _ X 5 R _ 06
1 0 u_ 6 . 3 V _ X5 R _0 6
1 0u _ 6 . 3V _X 5 R _ 0 6
1 0 u _ 6. 3 V _ X 5R _ 06
C 7 1
1 0u _ 6 . 3V _X 5 R _ 0 6
1229 D02 (W24 0HU)
0. 8 5 V S
All VDDQ = 6A
C 3 2 3
C 3 45
C 28
P C 1 67
+
1 0u _ 6 . 3V _X 5 R _ 0 8
10 u _ 6. 3 V _ X 5 R _ 08
1 0 u_ 6 . 3 V _ X5 R _0 6
* 3 30 U _ 2 V _ D2 _ D
1 . 5 V S _ C P U
123 0 D02
V C C S A _ S E N S E
V C C S A _S E N S E
36
* 1 0K _ 0 4
R 3 93
R 53 2
* 0_ 0 4
V C C S A _ V I D 0 3 6
R 5 6
1 0 K _ 0 4
V C C S A _ V I D 1 3 6
1 0 K _ 04
R 3 86
3 , 8 , 9 , 1 0, 20 , 2 7 , 32 , 3 4
3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 3 , 24 , 2 5 , 2 6, 2 8 , 2 9, 30 , 3 1 , 32 , 3 7
Schematic Diagrams
1. 5 V
R 11 9
1 K _ 1 %_ 0 4
V _ S M_ V R E F _ C N T
R 11 7
1 K _ 1 %_ 0 4
11/03
S U S B #
1 5 , 27 , 2 8 , 3 2
1 . 5V S _C P U
12 30 D0 2
Sheet 6 of 46
C 4 0 0
+
33 0 U _ 2 V _ D 2 _ D
PROCESSOR/
POWER2
1124 for ? ? ? ?
C 8 1 1
*1 0u _ 6 . 3 V _X 5 R _ 0 6
3 6
0 . 85 V S
1 9 , 30 , 3 2
1 . 5V S
1 8 , 19 , 3 4
1 . 8V S
1 . 5V
3 , 3 2
1 . 5V S _C P U
3 8
V GF X_ C OR E
3 . 3V S
PROCESSOR/ POWER2 B - 7
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