Sony DVP-F25 Service Manual page 62

Pin No. Pin Name
55 VCC
56 CKSW3
57 CKSW1
58 CS0X
59 CS1X
60 CS2X
61 CS3X
62 CS4X
63 CS5X
64 VCCI
65 CS6X
66 CX7X
67 XWAIT
68 BGRNTX
69 BRQ
70 XRD
71 XWRH
72 XWRL
73 NMIX
74 VCCI
75 VSS
76 XFRRST
77 CPUCK
78 CKSW2
79 XDACS
80 CMM
81 48/44.1K
82 XLDON
83 MAMUTE
84 SRAMWE
85-92 HD0-HD7
93-100 HD8-HD15
101 VSS
102-109 HA0-HA7
110 VCC
111-118 HA8-HA15
119 VSS
120 HA16
I/O
– Power supply (+3.3 V)
I Chuck sensor input3
I Tray sensor input1
O Chip select signal output (for external ROM)
– Not used
O AV DEC chip select signal output
O AV DEC chip select signal output
O ARP chip select signal output
O SDSP chip select signal output
– Power supply (+1.8 V)
– Not used
– Not used
I Wait signal input
I Test terminal (fixed at "H")
I Test terminal (fixed at "L")
O Read enable signal output
O High order byte write enable signal output
– Not used
I Not used (Fixed at "H")
– Power supply (+1.8 V)
– GND
I IF CON reset signal input
O CPU clock signal output
– Chuck sensor input2
O DAC (2 CH) chip select signal output
– Chucking motor –
O PLL FS control signal output
O LD mute signal output
O Audio mute signal output
– Not used
I/O Data bus D0 to D7 (16 bits only)
I/O Data bus D8 to D15 (16 bits) and D0 - D7 (8 bits)
– GND
O Address bus A00 to A07
– Power supply (+3.3 V)
O Address bus A08 to A15
– GND
O Address bus A16
5-2E
Function