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4

TEST AND CHECKING FAILURE

Caution
 To avoid system faults, check the safety stop function at least once per year.
To comply with SIL 3, the safety stop function must be checked at least once in three months.
Also, check the safety stop function at system installation, any software changes, and parameter
setting changes.
I/O status and inverter operation
The FR-A800/F800 inverter's safety related I/O status obeys the following truth table.
Internal
Input
safety
power
circuit
status
OFF
Normal
Normal
Normal
Normal
ON
Fault
Fault
Fault
Fault
∗1 ON: The transistor is conducted. OFF: The transistor is not conducted.
∗2 When not using the safety stop function, short across terminals S1 and PC, S2 and PC, and SIC and SD to use the inverter.
(In the initial status, terminals S1 and PC, S2 and PC, and SIC and SD are respectively shorted with shorting wires.)
∗3 If any of the protective functions shown in the following table is activated, the terminal So (SO) and the SAFE output signal
turns OFF.
Error definition
Option fault.
Communication option fault
Parameter storage device fault
Retry count excess
Parameter storage device fault
Operation panel power supply short circuit/
RS-485 terminals power supply short circuit
24 VDC power fault
Safety circuit fault
Overspeed occurrence
∗4 When the internal safety circuit is operated normally, the terminal So (SO) and the SAFE output signal remain ON until E.SAF
is displayed, and the terminal So (SO) and the SAFE output signal turn OFF when E.SAF is displayed.
∗5 SA is displayed when the terminals S1 and S2 are identified as OFF due to the internal safety circuit failure.
∗6 If another fault occurs at the same time as E.SAF, the other fault can be displayed.
∗7 If another warning occurs at the same time as SA, the other warning can be displayed.
∗8 For the SAFE signal, refer to the following table and assign the function using Pr.190 to Pr.196 (output terminal function
selection). The ON/OFF state of the output signal is the one for the positive logic. The ON and OFF are reversed for the
negative logic.
SAFE
∗9 The use of SAFE signal has not been certified for compliance with safety standards.
12
TEST AND CHECKING FAILURE
Table 6 Truth table of safety related signals
Input terminal
,
∗1
∗2
terminal
S1
S2
So (SO)
OFF
ON
ON
ON
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
ON
ON
ON
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
Operation panel indication
E.OPT
E.OP1 to E.OP3
E.PE
E.RET
E.PE2
E.CTE
E.P24
E.SAF
E.OS
Output
signal
80
Output
Output
signal
,
∗8
∗9
SAFE
Output shutoff
OFF
(Safe state)
OFF
Drive enabled
∗3
Output shutoff
OFF
∗4
∗4
(Safe state)
Output shutoff
OFF
∗4
∗4
(Safe state)
Output shutoff
ON
∗3
∗3
(Safe state)
Output shutoff
OFF
(Safe state)
Output shutoff
OFF
(Safe state)
Output shutoff
OFF
(Safe state)
Output shutoff
OFF
(Safe state)
Error definition
Speed deviation excess detection
Signal loss detection
Excessive position fault
Brake sequence fault
Encoder phase fault
Magnetic pole position unknown
CPU fault
Internal circuit fault
Pr.190 to Pr.196 settings
Positive logic
Operation panel
Inverter
indication
running
status
E.SAF
∗6
Not
displayed
Not
displayed
Displayed
Displayed
Not
displayed
Displayed
Displayed
Displayed
Displayed
Operation panel indication
E.OSD
E.ECT
E.OD
E.MB1 to E.MB7
E.EP
E.MP
E.CPU
E.5 to E.7
E.13
Negative logic
180
SA
∗7
Not
displayed
Not
displayed
Displayed
Displayed
Displayed
Not
displayed
∗5
Displayed
Displayed
Displayed

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