Sh7709A Fp-208C (Xy065A00) Cpu - Yamaha DM2000 Service Manual

DM2000

SH7709A FP-208C (XY065A00) CPU

PIN
NAME I/O
NO.
1 MD1 I Clock mode
2 MD2 I Clock mode
3 Vcc-RTC*1 - Power supply for RTC (1.8 V)
4 XTAL2 O Crystal oscillator for RTC
5 EXTAL2 I Crystal oscillator for RTC
6 Vss-RTC*1 - Ground
7 NMI I Non-maskable interrupt request
8 IRO0/IRL0/PTH[0] I Interrupt request/Input port H
9 IRO1/IRL1/PTH[1] I Interrupt request/Input port H
10 IRO2/IRL2/PTH[2] I Interrupt request/Input port H
11 IRO3/IRL3/PTH[3] I Interrupt request/Input port H
12 IRO4/PTH[4] I Interrupt request/Input port H
13 D31/PTB[7] I/O Data bus/Port B
14 D30/PTB[6] I/O Data bus/Port B
15 D29/PTB[5] I/O Data bus/Port B
16 D28/PTB[4] I/O Data bus/Port B
17 D27/PYB[3] I/O Data bus/Port B
18 D26/PTB[2] I/O Data bus/Port B
19 VssO - Ground
20 D25/PTB[1] I/O Data bus/Port B
21 VccO - Power supply (3.3 V)
22 D24/PTB[0] I/O Data bus/Port B
23 D23/PTA[7] I/O Data bus/Port A
24 D22/PTA[6] I/O Data bus/Port A
25 D21/PTA[5] I/O Data bus/Port A
26 D20/PTA[4] I/O Data bus/Port A
27 Vss - Ground
28 D19/PTA[3] I/O Data bus/Port A
29 Vcc - Power supply (1.8 V)
30 D18/PTA[2] I/O Data bus/Port A
31 D17/PTA[1] I/O Data bus/Port A
32 D16/PTA[0] I/O Data bus/Port A
33 VssO - Ground
34 D15 I/O Data bus
35 VccO - Power supply (3.3 V)
36 D14 I/O Data bus
37 D13 I/O Data bus
38 D12 I/O Data bus
39 D11 I/O Data bus
40 D10 I/O Data bus
41 D9 I/O Data bus
42 D8 I/O Data bus
43 D7 I/O Data bus
44 D6 I/O Data bus
45 VssO - Ground
46 D5 I/O Data bus
47 VccO - Power supply (3.3 V)
48 D4 I/O Data bus
49 D3 I/O Data bus
50 D2 I/O Data bus
51 D1 I/O Data bus
52 D0 I/O Data bus
53 A0 I Address bus
54 A1 I Address bus
55 A2 I Address bus
56 A3 I Address bus
57 VssO - Ground
58 A4 I Address bus
59 VccO - Power supply (3.3 V)
60 A5 I Address bus
61 A6 I Address bus
62 A7 I Address bus
63 A8 I Address bus
64 A9 I Address bus
65 A10 I Address bus
66 A11 I Address bus
67 A12 I Address bus
68 A13 I Address bus
69 VssO - Ground
70 A14 I Address bus
71 VccO - Power supply (3.3 V)
72 A15 I Address bus
73 A16 I Address bus
74 A17 I Address bus
75 A18 I Address bus
76 A19 I Address bus
77 A20 I Address bus
78 A21 I Address bus
79 Vss - Ground
80 A22 I Address bus
81 Vcc - Power supply (1.8 V)
82 A23 I Address bus
83 VssO - Ground
84 A24 I
Address bus
85 VccO - Power supply (3.3 V)
86 A25 I Address bus
87 BS/PTK[4] I/O Bus cycle signal start/Port K
88 RD O Read strobe
89 WE0/DOMLL O D7-D0 select sugnal/DOM (SDRAM)
90 WE1/DOMLU/WE O D15-D8 select signal/DOM (SDRAM)
91 I/O D23-D16 select signal/DOM (SDRAM)/PCMCIA I/O read/Port K
WE2/DOMUL/ICIORD/PTK[6]
92 I/O D31-D24 select signal/DOM (SDRAM)/PCMCIA I/O write/Port K
WE3/DOMUU/ICIOWR/PTK[7]
93 RD/WR O Read/Write
94 AUDSYNC/PTE[7] I/O AUD sync. signal/Port E
95 VssO - Ground
96 CS0/MCS[0] O Chip select/Mask ROM chip select
97 VccO - Power supply (3.3 V)
CS2/PTK[0]
98 I/O Chip select2/Port K
99 CS3/PTK[1] I/O Chip select3/Port K
100 CS4/PTK[2] I/O Chip select4/Port K
101 CS5/CE1A/PTK[3] I/O Chip select5/CE1/Port K
102 CS6/CE1B I/O Chip select6/CE1
103 CE2A/PTE[4] I/O Card enable/Port E
104 CE2B/PTE[5] I/O Card enable/Port E
60
PIN
FUNCTION
NO.
NAME I/O
105 CKE/PTK[5] I/O CK enable/Port K
106 RAS3L/PTJ[0] I/O DRAM row address strobe/Port J
107 RAS2L/PTJ[1] I/O DRAM row address strobe/Port J
108 CASLL/CASL/PTJ[2] I/O Column address strobe (low)/Port J
109 VssO - Ground
110 CASLH/CASU/PTJ[3] I/O Column address strobe (high)/Port J
111 VccO - Power supply (3.3 V)
112 CASHL/PTJ[4] I/O HL Column address strobe/Port J
113 CASHH/PTJ[5] I/O HH Column address strobe/Port J
114 DACK0/PTD[5] I/O DMA acknowledge transfer strobe 0/Port D
115 DACK1/PTD[7] I/O DMA acknowledge transfer strobe 1/Port D
116 CAS2L/PTE[6] I/O Column address strobe (low)/Port E
117 CAS2H/PTE[3] I/O Column address strobe (high)/Port E
118 RAS3U/PTE[2] I/O DRAM address strobe/Port E
119 RAS2U/PTE[1] I/O DRAM address strobe/Port E
120 TDO/PTE[0] I/O Test data output/Port E
121 BACK O Bus acknowledge
122 BREO I Bus request
123 WAIT I Hardware wait request
124 RESETM I Reset
125 ADTRG/PTH[5] I Analog trigger/Input port H
126 IOISI6/PTG[7] I Write protect/Area 6 input/Input port G
127 ASEMD0/PTG[6] I ASE mode/Input port G
128 ASEBRKAK/PTG[5] I/O ASE break acknowledge/Input port G
129 PTG[4] I Input port G
130 AUDATA[3]/PTG[3] I/O AUD data/Input port G
131 AUDATA[2]/PTG[2] I/O AUD data/Input port G
132 Vss - Ground
133 AUDATA[1]/PTG[1] I/O AUD data/Input port G
134 Vcc - Power supply (1.8 V)
135 AUDATA[0]/PTG[0] I/O AUD data/Input port G
136 TRST/PTF[7]/PINT[15] I Test reset/Input port F/Interrupt port
137 TMS/PTF[6]/PINT[14] I Test mode switch/Input port F/Interrupt port
138 TDI/PTF[5]/PINT[13] I Input test data/Input port F/Interrupt port
139 TCK/PTF[4]/PINT[12] I Test clock/Input port F/Interrupt port
140 IRLS[3]/PTF[3]/PINT[11] I Interrupt request/Input port F/Interrupt port
141 IRLS[2]/PTF[2]/PINT[10] I Interrupt request/Input port F/Interrupt port
142 IRLS[1]/PTF[1]/PINT[9] I Interrupt request/Input port F/Interrupt port
143 IRLS[0]/PTF[0]/PINT[8] I Interrupt request/Input port F/Interrupt port
144 MD0 I Clock mode
145 Vcc-PLL1*2 - PLL1 Power supply (1.8 V)
146 CAP1 - PLL1 capacitor
147 Vss-PLL1*2 - PLL1 Ground
148 Vss-PLL2*2 - PLL2 Ground
149 CAP2 - PLL2 capacitor
150 Vcc-Pll2*2 - PLL2 Power supply (1.8 V)
AUDCK/PTH[6]
151 I AUD clock/Input port H
152 Vss - Ground
153 Vss - Ground
154 Vcc - Power supply (1.8 V)
155 XTAL O Clock oscillator
156 EXTAL I Clock/Crystal oscillator
157 STATUS0/PTJ[6] I/O cessor status/Port J
158 STATUS1/PTJ[7] I/O Pross./Port J
159 TCLK/PTH[7] I/O Clock/Port H
160 IROOUT O 'Interrupt request
161 VssO - Ground
162 CKIO I/O System Clock
163 VccO - Power supply (3.3 V)
164 TxD0/SCPT[0] O Data transmission 0/Output port
165 SOK0/SCPT[1] I/O Serial clock/Port
166 TxD1/SCPT[2] O Data transmission 1/Output port
167 SCK1/SCPT[3] I/O Serial clock/Port
168 TxD2/SCPT[4] O Data transmission 2/Output port
169 SCK2/SCPT[5] I/O Serial clock/Port
170 RTS2/SCPT[6] I/O Request to send 2/Output port
171 RxD0/SCPT[0] I Data reception 0/Output port
172 RxD1/SCPT[2] I Data reception 1/Output port
173 Vss - Ground
174 RxD2/SCPT[4] I Data reception 2/Output port
175 Vcc - Power supply (1.8 V)
176 CTS2/IRO5/SCP[7] I Clear to send 2/Interrupt request/Input port
177 MCS[7]/PTC[7]/PINT[7] I/O Mask chip select/Port C/Interrupt port
178 MCS[6]/PTC[6]/PINT[6] I/O Mask chip select/Port C/Interrupt port
179 MCS[5]/PTC[5]/PINT[5] I/O Mask chip select/Port C/Interrupt port
180 MCS[4]/PTC[4]/PINT[4] I/O Mask chip select/Port C/Interrupt port
181 VssO - Ground
182 WAKEUP/PTD[3] I/O Standby mode/Port D
183 VccO - Power supply (3.3 V)
184 RESETOUT/PTD[2] I/O Reset output/Port D
185 MCS[3]/PTC[3]/PINT[3] I/O Mask chip select/Port C/Interrupt port
186 MCS[2]/PTC[2]/PINT[2] I/O Mask chip select/Port C/Interrupt port
187 MCS[1]/PTC[1]/PINT[1] I/O Mask chip select/Port C/Interrupt port
MCS[0]/PTC[0]/PINT[0] I/O
188 Mask chip select/Port C/Interrupt port
189 DRAK0/PTD[1] I/O DMA transfer request/IPort D
190 DRAK1/PTD[0] I/O DMA transfer request/IPort D
191 DREQ0/PTD[4] I DMA transfer request/Input port D
192 DREQ1/PTD[6] I DMA transfer request/Input port D
193 RESETP I Power on reset
194 CA I Chip active/Hardware stand by request
195 MD3 I Area 0 bus allocation
196 MD4 I Area 0 bus allocation
197 MD5 I Area 0 bus allocation
198 AVss - Ground
199 AN[0]/PTL[0] I AD converter input/Input port L
200 AN[1]/PTL[1] I AD converter input/Input port L
201 AN[2]/PTL[2] I AD converter input/Input port L
AN[3]/PTL[3]
202 I AD converter input/Input port L
203 AN[4]/PTL[4] I AD converter input/Input port L
204 AN[5]/PTL[5] I AD converter input/Input port L
205 AVcc (3.3 V) - Analog Power supply (3.3 V)
206 AN[6]/DA[1]/PTL[6] I AD converter input/Input port L
207 AN[7]/DA[0]/PTL[7] I AD converter input/Input port L
208 AVss - Ground
CPU: IC101
FUNCTION