Beckhoff CB1064 Series Manual page 104

Kapitel: BIOS-Einstellungen
 Program Static Phase1 Eq
Options: Disabled / Enabled
 Gen3 Root Port Preset Value for each Lane
Sub menu: see "PEG Gen3 Root Port Preset Value for each Lane" (page 106)
 PEG Gen3 Endpoint Preset Value for each Lane
Sub menu: see "PEG Gen3 Endpoint Preset Value each Lane" (page 107)
 PEG Gen3 Endpoint Hint Value for each Lane
Sub menu: see "PEG Gen3 Endpoint Hint Value each Lane" (page 108)
 Gen3 RxCTLE Control
Sub menu: see "Gen3 RxCTLE Control" (page 109)
 Always Attempt SW EQ
Options: Enabled / Disabled
 Number of Presets to test
Options: 7, 3, 5 / 0-9 / Auto
 Allow PERST# GPIO Usage
Options: Disabled / Enabled
 SW EQ Enable VOC
Options: Jitter Only Test Mode / Jitter & VOC Test Mode / Auto
 Jitter Dwell Time
Options: 0..65535
 Jitter Error Target
Options: 1..65535
 VOC Dwell Time
Options: 0..65535
 VOC Error Target
Options: 1..65535
 Generate BDAT Margin DATA
Options: Disabled / Generate Port Jitter Data
 PCIe Rx CEM Test Mode
Options: Disabled / Enabled
 PEG Lane Number for Test
Options: 0..15
 Non-Protocol Awareness
Options: Disabled / Enabled
Seite 104 Beckhoff New Automation Technology CB1064-xxxx
Chipset