Mitsubishi Electric Q172CPU Programming Manual page 93

Melsecq series motion controller sv43
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3 COMMUNICATION BETWEEN THE PLC CPU AND THE MOTION CPU IN
THE MULTIPLE CPU SYSTEM
PLC CPU (CPU No.1)
Send range for each CPU
CPU
CPU share memory G
Point
Start
No.1
48
No.2
66
No.3
0
No.4
PLC CPU (CPU No.1)
Send range for each CPU
CPU
CPU share memory G
Point
Start
No.1
118
No.2
640
No.3
0
No.4
PLC CPU (CPU No.1)
Send range for each CPU
CPU
CPU share memory G
Point
Start
No.1
48
No.2
0
No.3
66
No.4
PLC CPU (CPU No.1)
Send range for each CPU
CPU
CPU share memory G
Point
Start
No.1
118
No.2
0
No.3
640
No.4
Automatic refresh setting 1
CPU side device
Dev. starting
End
Start
End
M0
M767
M768
M1823
Automatic refresh setting 2
CPU side device
Dev. Starting
End
Start
End
D0
D117
D118
D757
Automatic refresh setting 3
CPU side device
Dev. Starting
M1824
End
Start
End
M1824
M2591
M2592
M3647
Automatic refresh setting 4
CPU side device
Dev. starting
D758
End
Start
End
D758
D875
D876
D1515
3 - 16
Motion CPU (CPU No.2)
Send range for each CPU
CPU
M0
CPU share memory G
Point
No.1
48
No.2
66
No.3
0
No.4
Motion CPU (CPU No.2)
Send range for each CPU
CPU
D0
CPU share memory G
Point
No.1
118
No.2
640
No.3
0
No.4
Motion CPU (CPU No.2)
Send range for each CPU
CPU
CPU share memory G
Point
No.1
48
No.2
0
No.3
66
No.4
(Note): A dummy setting (*) is made so that an excessive device may not be
refreshed in the Motion CPU No.2.
Motion CPU (CPU No.2)
Send range for each CPU
CPU
CPU share memory G
Point
No.1
118
No.2
0
No.3
640
No.4
(Note): A dummy setting (*) is made so that an excessive device may not be
refreshed in the Motion CPU No.2.
CPU side device
Dev. starting
Start
End
Start
M3072
M2000
CPU side device
Dev. starting
Start
End
Start
D640
D0
CPU side device
Dev. starting
Start
End
Start
CPU side device
Dev. starting
Start
End
Start
*
End
M3839
M3055
*
End
D757
D639
*
End
*
*
*
*
*
End
*
*
*
*

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