GE B90 Instruction Manual page 59

Ur series low impedance bus differential system
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3 HARDWARE
NOTE: This diagram is based on the following order code:
B90-H02-HCL-F8H-H6H-L8H-N6A-S8H-U6H-W7H
This diagram provides an example of how the device
is wired, not specifically how to wire the device. Please
refer to the Instruction Manual for additional details on
wiring based on various configurations.
*
Fibre
Optic
Shielded
Ground at
twisted pairs
Remote
Device
Co-axial *
Co-axial
Co-axial
Co-axial * - For IRIG-B Input
only use one
terminal as input
DC
AC or DC
No. 10AWG
Minimum
MODULES MUST BE
GROUNDED IF
GE Multilin
Tx1
Rx1
Tx2
Rx2
FIBER
FIBER
CHANNEL 1
CHANNEL 2
B90 COMMUNICATIONS
W7H
GE Consumer & Industrial
Multilin
B90 BUS DIFFERENTIAL RELAY
(PHASE B PROTECTION)
H1a
H1
H1b
V
H1c
H2a
H2
H2b
V
H2c
H3a
H3
H3b
V
H3c
H4a
H4
H4b
V
H4c
H5a
H5
H5b
V
H5c
H6a
H6
H6b
V
H6c
H7a
CONTACT INPUT H7a
H7c
CONTACT INPUT H7c
H8a
CONTACT INPUT H8a
H8c
CONTACT INPUT H8c
H7b
COMMON H7b
H8b
SURGE
U1a
U1b
U1
V
U1c
U2a
U2b
U2
V
U2c
U3a
U3b
U3
V
U3c
U4a
U4b
U4
V
U4c
U5a
U5b
U5
V
U5c
U6a
U6b
U6
V
Wet
U6c
U7a
CONTACT INPUT U7a
U7c
CONTACT INPUT U7c
CONTACT INPUT U8a
U8a
U8c
CONTACT INPUT U8c
U7b
COMMON U7b
U8b
SURGE
N1a
N1b
N1
V
N1c
N2a
N2b
N2
V
N2c
N3a
N3b
N3
N3c
N4a
N4b
N4
Dry
N4c
N5a
CONTACT INPUT N5a
N5c
CONTACT INPUT N5c
N6a
CONTACT INPUT N6a
N6c
CONTACT INPUT N6c
N5b
COMMON N5b
N7a
CONTACT INPUT N7a
N7c
CONTACT INPUT N7c
N8a
CONTACT INPUT N8a
N8c
CONTACT INPUT N8c
N7b
COMMON N7b
N8b
SURGE
10BaseFL
Tx1
NORMAL
Rx1
10BaseFL
COM
Tx2
ALTERNATE
Rx2
1
10BaseT
D1a
RS485
D2a
COM 2
D3a
com
D4b
D4a
IRIG-B
Input
BNC
IRIG-B
BNC
Output
B1b
CRITICAL
B1a
FAILURE
B2b
B3a
48 VDC
OUTPUT
B3b
B5b
HI
CONTROL
B6b
LO
POWER
B6a
B8a
SURGE
B8b
FILTER
GROUND BUS
X
W
V
U
T
S
R
TERMINAL IS
7
6
8
PROVIDED
COM
Inputs/
CT
outputs
Figure 3–10: TYPICAL WIRING DIAGRAM (PHASE B)
B90 Low Impedance Bus Differential System
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IED 2
IG1
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IG1
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IG1
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IG1
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IG1
IA5
IA
IA1
IB5
IB
IB1
IC5
IC
IC1
IG5
IG
IG1
836777A4.CDR
MODULE ARRANGEMENT
P
N
M
L
K
J
H
G
F
D
B
6
8
6
8
9
1
Inputs/
CT
Power
Inputs/
CT
CPU
outputs
Supply
outputs
3.2 WIRING
B
F1
F1a
F1b
F1c
F2
F2a
F2b
F2c
F3
F3a
F3b
F3c
F4
F4a
F4b
F4c
F5
F5a
F5b
F5c
F6
F6a
F6b
F6c
F7
F7a
F7b
F7c
F8
F8a
F8b
F8c
F9
L1a
L1b
L1c
F10
L2a
L2b
L2c
F11
L3a
L3b
L3c
F12
L4a
L4b
L4c
F13
L5a
L5b
L5c
F14
L6a
L6b
L6c
F15
L7a
L7b
L7c
F16
L8a
L8b
L8c
F17
S1a
S1b
S1c
F18
S2a
S2b
S2c
F19
S3a
S3b
S3c
F20
S4a
S4b
S4c
F21
S5a
S5b
S5c
F22
S6a
S6b
S6c
F23
S7a
S7b
S7c
F24
S8a
S8b
S8c
3
3-9

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