Motorola CPV5300 CompactPCI Installation Manual page 73

Single board computer and transition module
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Pin Assignments
Table A-22. Signal Descriptions for CPV5300 SBC (J5)/CPV5300 TM
(P5) Backplane Connector Pin Assignments (Continued)
Signal
Floppy Disk Drive,
TTL levels
EIDE (ATA-2),
TTL levels
Signal
Mnemonic
RI
ring indicator
RTS
request to send
RXD
serial receive data
TXD
serial transmit data
DSKCHG
indicates the drive door has been opened
DIR
controls direction of the head during step operations
DRVDENS
disk density select communication
[1:0]
DS[1:0]
drive selects
HDSEL
selects top or bottom side head
INDEX
indicates the beginning of a track
MTR[1:0]
motor enables
RDATA
data read
STEP
step, pulses move head in or out
TR0
indicates that head is positioned above track 00
WDATA
write data to drive
WGATE
enables head write circuitry of drive
WPROT
indicates a disk is write protected
IOCS16
indicates a 16 bit register is decoded
DMARQ
drive DMA request
DMACK
drive DMA acknowledge
DIOR
drive I/O read
DIOW
drive I/O write
DASP
drive active/slave present
IORDY
indicates drive is ready for I/O cycle(s)
DD[15:0]
drive data lines, bits 15 - 0
DRESET
reset signal to drive
CS1
chip select drive 0, also command register block
select
Signal Description
A
A-29

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