Mitsubishi Electric MELSEC iQ-R User Manual page 224

High speed analog-digital converter module
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CH1 Process alarm lower upper limit value
Medium speed
Set a lower upper limit value of the warning output function (process alarm).
For details on the warning output function (process alarm), refer to the following.
Page 52 Process alarm
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Process alarm lower upper limit value
■Setting range
The setting range is from -32768 to 32767.
■Enabling the setting
Turn on and off 'Operating condition setting request' (Y9).
■Default value
The default value is 0 for all channels.
CH1 Process alarm lower lower limit value
Medium speed
Set a lower lower limit value of the warning output function (process alarm).
For details on the warning output function (process alarm), refer to the following.
Page 52 Process alarm
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Process alarm lower lower limit value
■Setting range
The setting range is from -32768 to 32767.
■Enabling the setting
Turn on and off 'Operating condition setting request' (Y9).
■Default value
The default value is 0 for all channels.
• When using the process alarm, configure the 4-step settings of the process alarm upper upper limit value,
upper lower limit value, lower upper limit value, and lower lower limit value.
• In the channel where a set value does not satisfy the condition "the upper upper limit value  the upper
lower limit value  the lower upper limit value  the lower lower limit value", a process alarm upper lower
limit value setting range error (error code: 1BH) occurs.
• Since the default value is 0, change the value.
• When the scaling function, shift function, digital clipping function, or difference conversion function is used,
warning targets are digital operation values to which the operation of each function was reflected. Be sure to
consider operation results of each function to set values.
APPX
222
Appendix 3 Buffer Memory Areas
Simultaneous
Low speed
conversion
Simultaneous
Low speed
conversion
Synchronization
CH1
CH2
518
718
Synchronization
CH1
CH2
520
720
CH3
CH4
918
1118
CH3
CH4
920
1120

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