Sync Clock; Figure 3-59 Digital Generator > Output Config > Sync Clock Menu Page; Table 3-31 Digital Generator > Output Config > Sync Clock Menu Description - Keysight U8903B User Manual

Sync clock

Figure 3-59
Table 3-31 Digital Generator > Output Config > Sync Clock menu description
Menu Description
Output Press the Output softkey to enable or disable the synchronous clock output.
Press the Source softkey to select the synchronous clock source. Refer to "Append ix 20: Digital System Clock
Distribution Block Diagram" on page
– Internal
Source
– AES RCLK
– External
Press the Divider softkey to select the synchronous clock divider value. When the synchronous clock divider is set to 1, the
synchronous clock is locked to 128 × sampling rate (bi-phase clock). When the synchronous clock divider is set to 128, the
Divider synchronous clock is divided by 128 which is equal to the sampling rate set at the U8903B.
– 1
– 128
Keysight U8903B User's Guide
Digital Generator > Output Config > Sync Clock menu page
565 for more information on the system clock.
Audio Generator Functions 3
145