GE B90 Instruction Manual page 438

INTRODUCTION CHAPTER 9: THEORY OF OPERATION
Figure 9-1: Bus differential protection block diagram
The currents are digitally pre-filtered (Block 1) in order to remove the decaying DC components and other signal
distortions.
The filtered input signals are brought to a common scale taking into account the transformation ratios of the connected
CTs (Block 2). See the Dynamic Bus Replica section in this chapter.
Phasors of the differential zone currents are estimated digitally (Block 3), and the differential (Block 4) and restraining (Block
5) signals are calculated. See the Differential Principle section.
The magnitude of the differential signal is compared with a threshold, and an appropriate flag indicating operation of the
unbiased bus differential protection is produced (Block 6).
The magnitudes of the differential and restraining currents are compared and two auxiliary flags that correspond to two
specifically shaped portions of the differential operating characteristic (DIF1 and DIF2) are produced (blocks 7 and 8). The
characteristic is split in order to enhance performance of the relay by applying diverse security measures for each of the
regions. See the Differential Principle section.
The directional element (Block 10) supervises the biased differential characteristic when necessary. The current directional
comparison principle is used that processes phasors of all the input currents as well as the differential and restraining
currents. See the Directional Principle section.
9
The saturation detector (Block 9) analyzes the differential and restraining currents as well as the samples of the input
currents. This block sets its output flag upon detecting CT saturation. See the Saturation Detector section.
The output logic (Block 11) combines the differential, directional, and saturation flags into the biased differential operation
flag. The applied logic enhances performance of the relay while keeping an excellent balance between dependability/
speed and security. See the Output Logic and Examples section.
9-2 B90 LOW IMPEDANCE BUS DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL