Appendix 5.4.4 Device Latch Function - Mitsubishi Electric Q01UCPU User Manual

Appendix 5.4.4
(1) Overview
The device latch function
or High Performance model QCPU.
This section describes the enhanced device latch function of the Universal model QCPU.
*1 The latch function is used to hold device data even when the CPU module is powered off or reset.
(2) Device data latch methods
Device data of the Universal model QCPU can be latched by:
• using the large-capacity file register
• writing/reading device data to/from the standard ROM (with the SP.DEVST and S(P).DEVLD instructions),
• specifying a latch range of internal user devices, or
• setting intervals ("Time Setting") in the latch interval setting parameter.
*1 The extended data register (D) and extended link register (W) are included.
*2 Only the High-speed Universal model QCPU supports the setting.
(3) Details of each latch method
(a) Large-capacity file register
Data in the file register can be latched by batteries.
File register size is larger and processing speed is higher in the Universal model QCPU, compared to the Basic
model QCPU and High Performance model QCPU.
To latch a lot of data (many device points), use of the file register is effective. For the file register size in each
CPU module, refer to Page 389, Section 4.7.2 (1)
*1 The latch range can be changed in the Device tab of the PLC parameter dialog box. (Setting of a file register:
Page 393, Section 4.7.4 (1) (c), Settings of an extended data register (D) and an extended link register (W):
400, Section 4.8 (2) (b))
(b) Writing/reading device data to the standard ROM (SP.DEVST and S(P).DEVLD
instructions)
Device data of the Universal model QCPU can be latched using the SP.DEVST and S (P).DEVLD instructions
(instructions for writing/reading data to/from the standard ROM).
Utilizing the standard ROM allows data backup without batteries.
This method is effective for latching data that will be updated less frequently.
Device latch function
*1
of the Universal model QCPU is more enhanced than than of the Basic model QCPU
*1
,
.
*2
*1
APPENDICES
A
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543