Sony HCD-LF1 Service Manual page 79

• DMB07 BOARD IC901 CXP973064-245R (MECHANISM CONTROLLER)
Pin No. Pin Name
1 NO_USE
2 SDEN
3 DOCTRL/ISBTEST
4 XRST_2753
5 SDA_EEP
6 MNT1
7 FCS_JMP_1
8 FCS_JMP_2
9 SENS_CD
10 CDSP2
11 CDSP4
12 XCS_DVD
13 VSS
14 to 21 D0 to D7
22, 23 INIT0_DVD, INIT1_DVD
24 MSCK_SAMBA
25 XRST_1882
26 SCOR
27 LAT_CD
28 LDON
29 MIRR
30 COUT_CD
31 INLIM
32 CS_ZIVA
33 SI_ZIVA
34 SO_ZIVA
35 SCK_ZIVA
36 DRVIRQ
37 DRVRDY
38 RST
39 VSS
40 XTAL
41 EXTAL
42 VDD
43, 44 SLED_A, SLED_B
45 SCK_DSD
46 SDOUT_DSD
47 SDIN_DSD
48 READY_DSD
49 DATA_CD
50 CLOK_CD
51 XMSLAT
52 SQSO
53 MUTE_DSD
I/O
O Not used
O Serial data enable signal output to the CD/DVD/SACD RF amplifier
Digital out on/off control signal output to the DSP and DSD decoder
O
"L": digital out off, "H": digital out on
O Reset signal output to the DSD decoder
I/O Data bus with the EEPROM
I EEPROM ready signal input from the DVD decoder
O Focus jump 1 signal output to the motor/coil driver
O Focus jump 2 signal output to the motor/coil driver
I Internal status (SENSE) signal input from the DSP
System clock frequency selection signal output to the DSP
O
"L": 16.9344 MHz, "H": 33.8688MHz
O Not used
O Chip select signal output to the DVD decoder
— Ground terminal
I/O Two-way data bus with the DVD decoder
I Interrupt signal input from the DVD decoder
O Serial data transfer clock signal output to the DSD decoder
O Reset signal output to the DVD decoder
I Subcode sync (S0+S1) detection signal input from the DSP
O Serial data latch pulse signal output to the DSP
O Laser diode on/off control signal output to the CD/DVD/SACD RF amplifier
I Mirror signal input from the CD/DVD/SACD RF amplifier and DSP
I Numbers of track counted signal input from the DSP
Detection signal input from limit in switch
I
The optical pick-up is inner position when "H"
O Chip select signal output terminal
I Serial data input from the DVD system processor
O Serial data output to the DVD system processor
O Serial data transfer clock signal output to the EEPROM and DVD system processor
O Interrupt request signal output to the DVD system processor
O Ready signal output to the DVD system processor
I Reset signal input from the DVD system processor
— Ground terminal
I System clock input terminal (20 MHz)
O System clock output terminal (20 MHz)
— Power supply terminal (+3.3V)
O Sled motor drive signal output terminal
O Output terminal for offset adjustment of APEO (<z/. pin of DVD decoder)
O Serial data output to the DSD decoder
I Serial data input from the DSD decoder
I Ready signal input from the DSD decoder
O Serial data output to the DSP
O Serial data transfer clock signal output to the DSP
O Serial data latch pulse signal output to the DSD decoder
I Subcode Q data input from the DSP
O Soft muting on/off control signal output terminal
Description
"L": reset
"L": reset
"L": reset
"L": ready
"H": muting on
HCD-LF1
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