Figure 12 Processor Clock Pulse (Clk2) - Intel 80960SA Manual

HIGH LEVEL (MIN) 0.7V
CC
LOW LEVEL (MAX) 0.8V
CLK2
CLK
OUTPUTS
RESET
INT0, INT1,
INT3, LOCK
NOTE: Initialization parameters must be set up at least four CLK2 periods before the first CLK2 "A" edge.
T
1
T
3
90%
1.5 V
10%
T
T
5
4
Figure 12. Processor Clock Pulse (CLK2)
T
17
INITIALIZATION PARAMETERS
Figure 13. RESET Signal Timing
T
2
A B C D
T
16
T
15
80960SA
A B C
19