P14D
9.2
SYSTEM CHECK LOGIC
System Checks
Disabled
Enabled
VAN
VBN
VCN
VAB
VBC
VCA
VTS Fast Block
F out of Range
CS1 Status
Enabled
CS1 Enabled
CS2 Status
Enabled
CS2 Enabled
SS Status
Enabled
SysSplit Enabled
V01205
Figure 159: System Check logic
P14D-TM-EN-8
CS1 Criteria OK
CS2 Criteria OK
Select
CS1 Slip Freq >
CS1 Slip Freq <
VBus
CS2 Slip Freq >
CS2 Slip Freq <
CS Vline > Vbus
CS Vline < Vbus
CS1 Fline > Fbus
CS1 Fline < Fbus
CS1 Angle not OK +
CS1 Angle not OK-
CS2 Fline > Fbus
CS2 Fline < Fbus
CS2 Angle not OK +
CS2 Angle not OK-
Angle rotating anticlockwise
Angle rotating clockwise
1
&
&
SS Criteria OK
&
&
&
&
&
CS Vline >
&
CS Vbus >
&
CS Vline <
&
CS Vbus <
&
&
&
&
&
&
&
&
&
&
&
&
&
Chapter 14 - Monitoring and Control
SysChks Inactive
CS1 Slipfreq>
CS1 Slipfreq<
CS2 Slipfreq>
CS2 Slipfreq<
CS Vline>
CS Vbus >
CS Vline<
CS Vbus <
CS Vline>Vbus
CS Vline<Vbus
CS1 Fline >Fbus
CS1 Fline <Fbus
CS1 Ang Not OK +
CS1 Ang Not OK -
CS2 Fline >Fbus
CS2 Fline <Fbus
CS2 Ang Not OK +
CS2 Ang Not OK -
CS Ang Rot ACW
CS Ang Rot CW
&
Check Sync 1 OK
&
Check Sync 2 OK
&
System Split
305