Analog Output Hold/Clear Function - Mitsubishi Electric Q62DAN User Manual

Melsecq series
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3 SPECIFICATIONS

3.2.2 Analog output HOLD/CLEAR function

D/A conversion enable/disable
Setting
(buffer memory address 0: Un\G0)
combination
CH
Output enable/disable flags (Y1 to Y8)
execution
status
HOLD/CLEAR setting
Analog output status when programmable controller CPU is
RUN
Analog output status when programmable controller CPU is
STOP
Analog output status when a programmable controller CPU
stop error occurs
Analog output status when a watchdog timer error
in D/A converter module
1 This occurs when program operations are not completed within the scheduled time due to a hardware
problem of the D/A converter module. When a watchdog timer error occurs, Module ready (X0) turns off
and the D/A converter module RUN LED turns off.
3 - 12
(1)
For the case where the programmable controller CPU is placed in STOP or in a
stop error status, whether to hold (HOLD) or clear (CLEAR) the analog output
value can be set.
(2)
Set the HOLD/CLEAR in "Switch 3" (HOLD/CLEAR function setting) cell of
Switch setting for I/O and intelligent function module dialog box. (Refer to Section
4.5 (1))
(3)
Depending on combinations of the HOLD/CLEAR setting, D/A conversion
enable/disable setting, and CH
analog out-put status varies as shown in Table 3.4.
Table 3.4 Analog output status combination list
1
occurs
Output enable/disable flag (Y1 to Y8), the
Enable
Enable
HOLD
CLEAR
Outputs the analog value of the
D/A converted digital value.
Hold
Offset
Hold
Offset
0 V/0 mA
0 V/0 mA
MELSEC-Q
Disable
Disable
Enable or disable
HOLD or CLEAR
HOLD or CLEAR
Offset
0 V/0 mA
Offset
0 V/0 mA
Offset
0 V/0 mA
0 V/0 mA
0 V/0 mA
3 - 12

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