Ring Counter Upper/Lower Limit Value Write - Mitsubishi Electric MELSEC-L Special Instructions Manual

Ring counter upper/lower limit value write

ICRNGWR1, ICRNGWR2
Structured ladder/FBD
ICRNGWR1
EN ENO
s1
s2
The following instruction can go in the dotted squares.
ICRNGWR1, ICRNGWR1P, ICRNGWR2, ICRNGWR2P
■Executing condition
Instruction
ICRNGWR1
ICRNGWR2
ICRNGWR1P
ICRNGWR2P
■Argument
Input/output
argument
Input argument
Output argument
Setting Internal device
data
Bit

(s1)

(s2)
Processing details
This instruction sets the ring counter lower limit value and the ring counter upper limit value of the specified CH (refer to the
following).
• ICRNGWR1(P): CH1
• ICRNGWR2(P): CH2
8 BUILT-IN I/O FUNCTION INSTRUCTION
288
8.2 Counter Function Dedicated Instruction
LCPU
ST
ENO:=
ICRNGWR1
Executing condition
Name Description
EN Executing condition
s1 Ring counter lower limit value (constant), or start
number of the device that stores the ring counter
lower limit value
• Constant: Settings which is within the range of -
2147483648 to 2147483647 and ((s1), (s1)+1) 
((s2), (s2)+1)
• Device: Within the range of specified device
s2 Ring counter upper limit value (constant), or start
number of the device that stores the ring counter
upper limit value
• Constant: Settings which is within the range of -
2147483648 to 2147483647 and ((s1), (s1)+1) 
((s2), (s2)+1)
• Device: Within the range of specified device
ENO Execution result
R, ZR
Word


(EN, s1, s2);
J\ U\G
Bit Word


Data type
Bit
ANY32
ANY32
Bit
Zn Constant


Others

