Application Information; Mono Btl Application; Pin Mode; Estimating The Output Power - Philips TDA8950 Product Data Sheet

2 × 150 w class-d power amplifier
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13. Application information

13.1 Mono BTL application

13.2 Pin MODE

13.3 Estimating the output power

13.3.1 Single-Ended (SE)

TDA8950_2
Product data sheet
When using the power amplifier in a mono BTL application, the inputs of the two channels
must be connected in parallel and the phase of one of the inputs must be inverted; see
Figure
7. In principle, the loudspeaker can be connected between the outputs of the two
single-ended demodulation filters.
To ensure a pop noise-free start-up, an RC time-constant must be applied to pin MODE.
The bias-current setting of the VI converter input is directly related to the voltage on pin
MODE. In turn the bias-current setting of the VI converters is directly related to the DC
output offset voltage. A slow dV/dt on pin MODE results in a slow dV/dt for the DC output
offset voltage, ensuring a pop noise-free transition between Mute and Operating modes. A
time-constant of 500 ms is sufficient to guarantee pop noise-free start-up; see
Figure 5
and
Figure 8
Maximum output power:
---------------------------------------------------- -
R
+
R
L
DSon hs
P
=
---------------------------------------------------------------------------------------------------------------------------------------- -
o 0.5%
Maximum output current is internally limited to 9.2 A:
V
1 t
P
I
=
---------------------------------------------------------------------
o peak
R
+
R
L
DSon hs
Where:
P
: output power at the onset of clipping
o(0.5 %)
R
: load impedance
L
R
: high-side R
DSon(hs)
R
: series impedance of the filter coil
sL
V
: single-sided supply voltage or 0.5
P
t
: minimum pulse width (typical 150 ns, temperature dependent)
w(min)
f
: oscillator frequency
osc
Remark: Note that I
o(peak)
the current through the load and the ripple current. The value of the ripple current is
dependent on the coil inductance and the voltage drop across the coil.
for more information.
R
L
V
1 t
P
+
R
sL
2R
L
0.5 f
w min
osc
+
R
sL
of power stage output DMOS (temperature dependent)
DSon
should be less than 9.2 A
Rev. 02 — 11 June 2009
2
150 W class-D power amplifier
2
0.5 f
w min
osc
(V
+ V
)
DD
SS
(Section
8.3.2). I
TDA8950
Figure
4,
(1)
(2)
is the sum of
o(peak)
© NXP B.V. 2009. All rights reserved.
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