Table of Contents
Advertisement
A
B
8
FROM/TO MPEG
MA4
7
MA3
MA5
MA2
MA6
MA1
MA7
MA0
MA8
MA10
MA9
MA11
MCS0#
MRAS#
MPCLK
MCAS#
MWE#
MDQM
6
MD8
MD7
MD9
MD6
MD10
MD5
MD11
MD4
MD12
MD3
MD13
MD2
MD14
MD1
MD15
MD0
5
4
3
2
1
A
B
E-3
C
SDRAM SCHEMATIC DIAGRAM
S-DRAM IC
IC4002
HY57V161610DTC-8
0
3.2
VSS
VCC
0
0.5
MD15
I/O15
I/O0
0.9
0.5
MD14
I/O14
I/O1
0
0
VSSQ
VSSQ
1.2
1.0
MD13
I/O13
I/O2
1.2
0.8
MD12
I/O12
I/O3
3.2
3.2
VCCQ
VCCQ
0.9
0.8
MD11
I/O11
I/O4
0.9
0.8
MD10
I/O10
I/O5
0
0
VSSQ
VSSQ
0.9
0.4
MD9
I/O9
I/O6
0.9
0.7
MD8
I/O8
I/O7
C4018
3.2
3.2
VCCQ
VCCQ
0.1 F
0
0
NC
NC
DQML
3.3
0
3.1
MDQM
DQMU
WE
7
1.5
3.1
MPCLK
CLK
CAS
3.2
3.0
CKE
RAS
0.1
2.9
NC
NC
CS
0.3
0.6
MA9
A9
A11
0.2
2.2
MA8
A8
A10
0.6
0.6
MA7
A7
A0
0.6
0.5
MA6
A6
A1
0.6
0.5
MA5
A5
A2
0.9
0.5
MA4
A4
A3
0
3.2
VSS
VCC
C4019
0.1
F
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
C
D
E
(SYSCON PCB)
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
MWE#
MCAS#
MRAS#
MCS0#
MA11
MA10
MA0
MA1
MA2
MA3
NOTE:
THE DC VOLTAGE AT EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK
D
E
F
G
FROM VIDEO ENCORDER
B4002
AT+D3.3V
N2012ZP600T25
DGND
F
G
H
8
7
6
5
4
3
2
PCB010
VMX212
1
H
E-4
Advertisement
Table of Contents
