Download  Print this page

GE B90 UR Series Instruction Manual Page 385

Low impedance bus differential system.
Hide thumbs
   
1
2
Table of Contents
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478

Advertisement

APPENDIX B
F257
ENUMERATION: PROCESS CARD DSP CONFIGURATION
value
instance
0
CC
1
CV
2
CD
3
VC
4
VV
5
VD
6
DC
7
DV
8
DD
F261
ENUMERATION: BANK REDUNDANCY TYPE
0 = None, 1 = Dependability Biased, 2 = Security Biased
F263
ENUMERATION: PROCESS BUS SYSTEM STATUS
0 = N/A, 1 = OK, 2 = Fail
F300
UR_UINT16: FLEXLOGIC BASE TYPE (6-bit type)
The FlexLogic BASE type is 6 bits and is combined with a 9 bit
descriptor and 1 bit for protection element to form a 16 bit value.
The combined bits are of the form: PTTTTTTDDDDDDDDD,
where P bit if set, indicates that the FlexLogic type is associated
with a protection element state and T represents bits for the BASE
type, and D represents bits for the descriptor.
The values in square brackets indicate the base type with P prefix
[PTTTTTT] and the values in round brackets indicate the descrip-
tor range.
[0] Off(0) – this is boolean FALSE value
[0] On (1) – this is boolean TRUE value
[2] CONTACT INPUTS (1 to 96)
[3] CONTACT INPUTS OFF (1 to 96)
[4] VIRTUAL INPUTS (1 to 64)
[6] VIRTUAL OUTPUTS (1 to 96)
[10] CONTACT OUTPUTS VOLTAGE DETECTED (1 to 64)
[11] CONTACT OUTPUTS VOLTAGE OFF DETECTED (1 to 64)
[12] CONTACT OUTPUTS CURRENT DETECTED (1 to 64)
[13] CONTACT OUTPUTS CURRENT OFF DETECTED (1 to 64)
[14] REMOTE INPUTS (1 to 32)
[28] INSERT (via keypad only)
[32] END
[34] NOT (1 INPUT)
[36] 2 INPUT XOR (0)
[38] LATCH SET/RESET (2 inputs)
GE Multilin
[40] OR (2 to 16 inputs)
[42] AND (2 to 16 inputs)
[44] NOR (2 to 16 inputs)
[46] NAND (2 to 16 inputs)
[48] TIMER (1 to 32)
[50] ASSIGN VIRTUAL OUTPUT (1 to 96)
[52] SELF-TEST ERROR (see F141 for range)
[56] ACTIVE SETTING GROUP (1 to 6)
[62] MISCELLANEOUS EVENTS (see F146 for range)
[64 to 127] ELEMENT STATES
F400
UR_UINT16: CT/VT BANK SELECTION
bitmask
F491
ENUMERATION: ANALOG INPUT MODE
0 = Default Value, 1 = Last Known
F500
UR_UINT16: PACKED BITFIELD
First register indicates input/output state with bits 0 (MSB) to 15
(LSB) corresponding to input/output state 1 to 16. The second reg-
ister indicates input/output state with bits 0 to 15 corresponding to
input/output state 17 to 32 (if required) The third register indicates
input/output state with bits 0 to 15 corresponding to input/output
state 33 to 48 (if required). The fourth register indicates input/out-
put state with bits 0 to 15 corresponding to input/output state 49 to
64 (if required).
The number of registers required is determined by the specific
data item. A bit value of 0 = Off and 1 = On.
F501
UR_UINT16: LED STATUS
Low byte of register indicates LED status with bit 0 representing
the top LED and bit 7 the bottom LED. A bit value of 1 indicates
the LED is on, 0 indicates the LED is off.
F502
BITFIELD: ELEMENT OPERATE STATES
Each bit contains the operate state for an element. See the F124
format code for a list of element IDs. The operate bit for element ID
X is bit [X mod 16] in register [X/16].
B90 Low Impedance Bus Differential System
B.4 MEMORY MAPPING
bank selection
0
Card 1 Contact 1 to 4
1
Card 1 Contact 5 to 8
2
Card 2 Contact 1 to 4
3
Card 2 Contact 5 to 8
4
Card 3 Contact 1 to 4
5
Card 3 Contact 5 to 8
B
B-69

Advertisement

Table of Contents

   Also See for GE B90 UR Series

   Related Manuals for GE B90 UR Series

Comments to this Manuals

Symbols: 0
Latest comments: