GE L60 Instruction Manual page 174

Ur series line phase comparison relay
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5.5 GROUPED ELEMENTS
Table 5–11: 87PC OSCILLOGRAPHY CHANNELS (Sheet 2 of 2)
CFG FILE LABEL
87PC Rx2N
87PC POS Aligned
87PC NEG Aligned
87PC Rx1P Aligned
87PC Rx1N Aligned
87PC Rx2P Aligned
87PC Rx2N Aligned
87PC POS Int Input
87PC NEG Int Input
87PC POS Integrator
87PC NEG Integrator
87PC Trip
FDH Aligned
TX Pos
TX Neg
Refer to Chapter 9: Application of Settings for the calculation examples for the 87PC element.
In single phase comparison schemes, coincidence of the local and remote squares is detected during half the power cycle
only, positive or negative. As a result, some delay in operation can be expected under "unfavorable" fault inception. This
weakness of the single phase comparison schemes is eliminated in dual phase comparison schemes but cost of the com-
5
munication link is higher.
Some advantages of dual phase comparison and two frequency FSK PLC are incorporated in the unblocking scheme.
Since there is no third or guard frequency available, the PLC low frequency signal serves as the guard frequency for some
logic implemented in this scheme. Tripping is permitted if the FDL relay sees the change in received signal form low to high
(indicated that communication link is healthy and remote relay detected the fault) within 20 ms after fault is detected. If the
PLC low frequency has not being received prior the fault detection, the trip output is blocked as well. Another enhancement
of this scheme is the trip window defined by the
trip decision within this time if the PLC signal was lost in the course of the fault.
The phase comparison function can be used for three-terminal line protection and breaker-and-a-half configuration. The
feature combines the advantages of the modern digital relay with the traditional "analog principle" approach. Pulses
received from a PLC are digitally sampled at 64 samples per cycle, providing excellent resolution. This also eliminates car-
rier building-up and tailing-off problems, since the voltage threshold for received pulses is user-programmable. If a pulse
received from PLC is consciously distorted and is not equal to half of the sinewave, it can be adjusted with the
settings. All phase comparison signals are captured and available in oscillography for commissioning, trouble-
ASYMMETRY
shooting, and analysis purposes. The L60 features excellent stability during channel noise due to the high sampling rate of
the received signal, and the unique integrator makes the digital phase-comparison relay fully equivalent to analogue phase-
comparison relays.
The following figure illustrates the phase comparison logic. The choice of the scheme must made by protection and control
engineer according to the communication equipment employed, requirements of trip speed, and reliability. These schemes
are considered in Chapter 8: Theory of Operation.
5-82
DESCRIPTION
Received pulse on channel 2N
Aligned (delayed) local positive pulse
Aligned (delayed) local negative pulse
Received and conditioned pulse on channel 1P
Received and conditioned pulse on channel 1N
Received and conditioned pulse on channel 2P
Received and conditioned pulse on channel 2N
Input of the positive integrator
Input of the negative integrator
Positive integrator in (degrees)
Negative integrator in (degrees)
Phase comparison trip signal
Aligned FDH pulse
Positive TX pulse
Negative TX pulse
87PC CHNL LOSS TRIP WINDOW
L60 Line Phase Comparison Relay
5 SETTINGS
setting. This logic allows the relay to make a
87PC CH1(2)
GE Multilin

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