Lsi Pin Description - Yamaha CLP-340 Service Manual

Hide thumbs Also See for CLP-340:
Table of Contents

Advertisement

LSI PIN DESCRIPTION

AK4396VF-E2 (X8324A00) DAC (Digital to Analog Converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DM9000AEP (X7029A00) LAN CONTROLLER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
MPD6S004S (X4404A01) DC-DC CONVERTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
R8A02032BG (X8810A00) CPU (SWX02) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30/31
T6TJ3XBG-0001 (X8940A00) SWP51L (Tone Generator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32/33
µPD780031AYGK-N06 (X259920R) E-TKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
μPD780031AYGK-N06 (X259920R) E-TKS
PIN
NAME
I/O
NO.
1
P50/A8
I/O
2
P51/A9
I/O
3
P52/A10
I/O
4
P53/A11
I/O
Port 5 / Higher address bus
5
P54/A12
I/O
6
P55/A13
I/O
7
P56/A14
I/O
8
P57/A15
I/O
9
Vss0
-
Ground
10
V
0
-
Power supply
DD
11
P30
I/O
Port 3
12
P31
I/O
13
P32/SDA0
I/O
Port 3 / Serial data input/output
14
P33/SCL0
I/O
Port 3 / Serial clock input/output
15
P34
I/O
16
P35
I/O
Port 3
17
P36
I/O
18
P20/SI30
I/O
Port 2 / Serial data input
19
P21/SO30
I/O
Port 2 / Serial data output
20
P22/SCK30
I/O
Port 2 / Serial clock input/output
21
P23RxD0
I/O
Port 2 / Serial data input
22
P24/TxD0
I/O
Port 2 / Serial data output
23
P25/ASCK0
I/O
Port 2 / Serial clock input/output
24
V
1
-
Power supply
DD
25
AVss
-
Ground
26
P17/ANI7
I
27
P16/ANI6
I
28
P15/ANI5
I
29
P14/ANI4
I
Port 1 / A/D converter analog input
30
P13/ANI3
I
31
P12/ANI2
I
32
P11/ANI1
I
AK4396VF-E2 (X8324A00) DAC (Digital to Analog Converter)
PIN
NAME
I/O
NO.
-
1
DV
Digital ground
SS
-
2
DV
Digital power supply +3.3 V
DD
I
3
Master clock input
MCLK
I
4
Power-down mode
PDN
I
5
Audio serial data clock
BICK
I
6
Audio serial data input
SDATA
I
7
L/R clock
LRCK
I
8
Soft mute/Chip select
SMUTE/CSN
I
9
DFS0/CAD0
Sampling speed mode select/Chip address 0
I
10
DEM0/CCLK
De-emphasis enable 0/Control data clock
I
11
DEM1/CDTI
De-emphasis enable 1/Control data input
I
12
DIF0
I
13
Digital input format
DIF1
I
14
DIF2
(LSI 端子機能表)
FUNCTION
FUNCTION
GH3 EBUS H/GH3 EBUS L/GH3 EBUS M: IC001
PIN
NAME
I/O
NO.
33
P10/ANI0
I
Port 1 / A/D converter analog input
34
AV
I
A/D converter reference voltage input
REF
35
AV
-
Analog power supply
DD
36
RESET
I
System reset input
37
XT2
-
Subsystem clock oscillation
38
XT1
I
39
IC
-
Internally connected
40
X2
-
Main system clock oscillation
41
X1
I
42
Vss1
-
Ground
43
P00/INTP0
I/O
44
P01/INTP1
I/O
Port 0 / External interrupt request input
45
P02/INTP2
I/O
46
I/O
Port 0 / External interrupt request input / Trigger signai input
P03/INTP3/ADTRG
47
P70/TI00/TO0
I/O
Port 7 / External count clock input / 16-bit timer/event counter 0 output
48
P71/TI01
I/O
Port 7 / Capture trigger input
49
I/O
P72/TI50/TO50
Port 7 / External count clock input / 8-bit timer/event counter 50 output
50
I/O
P73/TI51/TO51
Port 7 / External count clock input / 8-bit timer/event counter 51 output
51
P74/PCL
I/O
Port 7 / Clock output
52
P75/BUZ
I/O
Port 7 / Buzzer output
53
P64/RD
I/O
Port 6 / Strobe signal output for reading
54
P65/WR
I/O
Port 6 / Strobe signal output for writing
55
P66/WAIT
I/O
Port 6 / Wait insertion
56
P67/ASTB
I/O
Port 6 / Strobe output
57
P40/AD0
I/O
58
P41/AD1
I/O
59
P42/AD2
I/O
60
P43/AD3
I/O
Port 4 / Lower address/data bus
61
P44/AD4
I/O
62
P45/AD5
I/O
63
P46/AD6
I/O
64
A47/AD7
I/O
PIN
NAME
I/O
NO.
15
TTL
I
CMOS/TTL level select
16
VREFL
I
Low level voltage reference input
17
VREFH
I
High level voltage reference input
18
AV
-
Analog power supply +5 V
DD
19
AV
-
Analog ground
SS
20
AOUTR-
O
Rch negative analog output
21
AOUTR+
O
Rch positive analog output
22
AOUTL-
O
Lch negative analog output
23
AOUTL+
O
Lch positive analog output
24
VCOM
O
Common voltage output
25
P/S
I
Parallel/serial select
26
TST1/DZFL
O
Test 1/Lch zero input detect
27
TST2/CAD1
I
Test 2/Chip address 1
28
ACKS/DZFR
I/O
Master clock auto setting mode/Rch zero input detect
CLP-340/CLP-340M/CLP-340C
FUNCTION
DM: IC308
FUNCTION
29

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Clp-340mClp-340c

Table of Contents