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SDR-H200P / SDR-H200PC
3.2.
PROCESS BLOCK DIAGRAM
PROCESS BLOCK DIAGRAM
IC601 (DIGITAL SIGNAL PROCESSOR)
88
87
85
G DATA
78
101
100
+
98
FROM
CCD DRIVE
R DATA
95
(IC107:R)
92
(IC108:G)
(IC109:B)
89
77
72
B DATA
70
68
66
65
YCP
CNR
MEMORY
Y/C
PROCESSOR
H
DD
D NR
ZOOM
CONVERTER
V ZOOM
MEGA PIX
268
DSTBO
267
BUSY
269
1
3
290
288
DSC
D/D
I/F
285
266
264
263
261
259
6
5
4
DD FCK
265
VTR 45M
279
VTR CKO
270
BEND
BEND
151
120
118
ADM (0-15)
116
115
113
111
DSP
uCOM
105
I/F
103
102
152
XRE
143
RW
146
ALE
147
CLK RST
CLK RST
53
DSP RST
TRST
9
16
REC VIDEO(CAMERA) SIGNAL
MEGA PIX
TO/FROM
VIDEO
MEGA DSTB
MEGA BUSY
MEGA Y C DATA
TO
VIDEO
Y C DATA
CLK27A
TO/FROM
CLK45
VIDEO
CLK27CAM
IC6001 (SYSTEM MICROCOMPUTER)
43
BEND
2
ADDRESS
DATA
17
36
XRE
32
WE
L
38
DAS
CLK RST
123
107
DSP RST
PROCESS BLOCK DIAGRAM
SDR-H200P/SDR-H200PC
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