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APPENDICES
Communication using bidirectional protocol
Data transmission/reception in any format
Data reception by interrupt programs
ASCII data transmission/reception by ASCII-BIN conversion
Data transmission/reception by specifying transparent code
Specification of Receive transparent code
Specification of Transmission transparent 1st ( 3 )
Multiple specification of Transmission transparent 2nd to 10th
Communication using pre-defined protocol
Execution of the protocol selected from the pre-defined protocol library
Execution of the created or edited protocol
Addition of Sign character, Number of decimals, and Delimiter settings to Conversion variable
Variable number of characters setting for Non-verified reception
Echo back enable/disable setting for RS-422/485 interface
Registration of user frame for data communication
Registration of changeable data (added 05
Registration of changeable data (added 04
Registration of changeable data (added E5
Communication via public network, etc. (modem function)
Automatic initialization of modem
Remote password check
4
Callback (
)
Transmission control
Mode switching
Switch to GX Developer connection mode
Independent/linked operation of each interface
Support for 230400 bps
Data transmission/reception at low speed (transmission speed: 50 bps)
Control of RS(RTS) and ER(DTR) signal states
Programmable controller CPU information clear
Data communication monitoring time
Non procedure and non reception monitoring time format designation
Transmission control start/end free area designation
Communication data monitoring function
UINI instruction
Monitoring/testing of initial settings and setting values with utility package
Startup from the system monitor (
Addition to the setting items
GX Developer and GOT connection
Simultaneous connection of GX Developer and GOT to the Q series C24 (
Support for multiple CPU system
Communication with non-control CPU using the MC protocol
Communication with QnA compatible 4C frame (ASCII code)
Communication with QnA compatible 4C frame (binary code)
Multiple CPU setting using GX Developer (I/O assignment, switch setting, interrupt pointer setting,
etc.)
App. - 2
Function
, 0B
, 11
, and 17
H
H
H
H
and 0A
)
H
H
and EB
)
H
H
DC code control (including Xon/Xoff control)
DTR/DSR control
5
)
)
6
)
Formats 1 to 4
Format 5
MELSEC-Q
Q series C24
(function version)
QJ71C24N
QJ71C24
(-R2/R4)
(-R2)
B
B
A
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
1
(
)
(See (2))
—
App. - 2
A
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Troubleshooting
