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Pin No.
Pin Name
C14 to
C16
C17
FGPO_REC_SYNC
C18
C19
VDO_D03
C20 to
VDO_D08, VDO_D10,
C23
VDO_D12, VDO_D18
C24
C25
VDO_D22
C26
VDO_D31
D1
MM_DATA03
D2
D3
MM_DATA14
D4
D5
JTAG_TMS
D6
JTAG_TDO
D7
D8
D9
XTAL_OUT
D10
SYS_RST_OUT_N
D11
D12, D13
D14, D15
D16
VDO_D04
D17
VDO_D13
TE
L 13942296513
D18
VDO_CLK1
D19
VDO_D23
D20 to
VDO_D29, VDO_D19,
D22
VDO_D20
D23
PCI_SERR_N
D24
PCI_GNT_N
D25
PCI_GNT_A_N
D26
PCI_GNT_B_N
MM_DATA04, MM_
E1 to E4
DATA02, MM_DATA12,
MM_DATA13
E5
E6
E7 to E10
E11, E12
E13 to E16
E17, E18
E19, E20
E21, E22
E23
PCI_CLK
E24
VDO_AUX
E25
PCI_SYS_CLK
E26
VDO_D30
MM_DATA06, MM_
F1 to F3
DATA05, MM_DATA11
F4, F5
www
F22
F23
PCI_REQ_N
F24 to F26 VDO_D28 to VDO_D26
.
G1
MM_DQS1
G2
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I/O
VSS
-
Ground terminal
O
Not used
VCCP
-
Power supply terminal (+3.3V)
O
Not used
O
Digital video signal output to the D/A converter (for network section)
VCCP
-
Power supply terminal (+3.3V)
O
Digital video signal output to the D/A converter (for network section)
O
BLANK signal output to the D/A converter (for network section)
I/O
Two-way data bus with the SD-RAM
VCCM
-
Power supply terminal (+3.3V)
I/O
Two-way data bus with the SD-RAM
VCCM
-
Power supply terminal (+3.3V)
I
JTAG test mode select signal input terminal
O
JTAG test data signal output terminal
VCCA
-
Power supply terminal (+3.3V)
IIC_SCL
I/O
Two-way clock data bus with the EEPROM and D/A converter (for network section)
O
System clock input terminal
Reset signal output to the ethernet interface, D/A converter (for network section) and parallel
O
bus/I2C bus converter
XTAL_IN
I
System clock input terminal (27MHz)
VCCP
-
Power supply terminal (+3.3V)
VCCA
-
Power supply terminal (+3.3V)
O
Not used
O
Digital video signal output to the D/A converter (for network section)
O
Serial data transfer clock signal output to the D/A converter (for network section)
O
Digital video signal output to the D/A converter (for network section)
O
Vertical sync signal output to the D/A converter (for network section)
I/O
Two-way data bus with terminal
I/O
Two-way data bus with terminal
I
Interrupt request signal input from the parallel bus/I2C bus converter
I
Interrupt request signal input terminal
I/O
Two-way data bus with the SD-RAM
VSS
-
Ground terminal
VSS
-
Ground terminal
VCCP
-
Power supply terminal (+3.3V)
VSS
-
Ground terminal
VCCP
-
Power supply terminal (+3.3V)
VSS
-
Ground terminal
VCCP
-
Power supply terminal (+3.3V)
VSS
-
Ground terminal
I
System clock input terminal (27MHz)
O
Not used
O
Not used
O
Horizontal sync signal output to the D/A converter (for network section)
I/O
Two-way data bus with the SD-RAM
VSS
-
Ground terminal
VSS
-
Ground terminal
x
ao
y
I/O
Two-way data bus with terminal
O
Digital video signal output to the D/A converter (for network section)
i
I/O
Two-way data strobe signal with the SD-RAM
VCCM
-
Power supply terminal (+3.3V)
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8
Not used
Not used
Q Q
3
6 7
1 3
Not used
Not used
Not used
u163
Not used
.
STR-DA6400ES
2 9
9 4
2 8
Description
Not used
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
159

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