Electrical Part; Internal Block Diagram Of Ics; Cs5345_Datasheet; Pin Description - LG FB163U Service Manual

SECTION 3. ELECTRICAL PART

INTERNAL BLOCK DIAGRAM OF ICs

1. CS5345_DATASHEET

• PIN CONFIGURATION
SDA/CDOUT
SCL/CCLK
AD0/CS
AD1/CDIN
RESET
1. CS5345_DATASHEET

• PIN DESCRIPTION

Pin Name #
SDA/CDOUT 1
SCL/CCLK 2
AD0/CS 3
AD1/CDIN 4
VLC 5
RESET 6
AIN3A 7
AIN3B 8
AIN2A 9
AIN2B 10
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
VLC
CS5345
6
AIN3A 7
8
AIN3B
9
AIN2A
10
AIN2B
11
AIN1A
12

AIN1B

13 14 15 16 17 18 19 20 21 22 23 24
Pin Description
Serial Control Data (Input/Output) - SDA is a data I/O in I≤C
the control port interface in SPI
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Address Bit 0 (I≤C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I≤C Mode ;
CS is the chip-select signal for SPI format.
Address Bit 1 (I≤C) / Ser ial Control Data Input (SPI) (Input) - AD1 is a chip address pin in I≤C Mod e;
CDIN is the input data line for the control port interface in SPI Mode.
Control Port Power (Input) - Determines the required signal level for the control port interface. Refer
to the Recommended Operating Conditions for appropriate voltages.
Reset (Input) - The device enters a low-power mode when this pin is driven low.
Stereo Analog Input 3 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
Stereo Analog Input 2 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
Æ
TM
Mode.
3-1
VLS
36
35 TSTO
34 NC
33 NC
32
AGND
31 AGND
30 VA
29
PGAOUTB
28
PGAOUTA
27
AIN6B
26
AIN6A
25
MICBIAS
Mode. CDOUT is the output data line for
LGE Internal Use Only