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Circuit Description - Casio GZ-50M Service Manual

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CPU (LSI104: HD6433298A42F)
The 16-bit CPU contains a 32k-bit ROM, a 1k-bit RAM, seven 8-bit I/O ports and MIDI interfaces. The
CPU receives MIDI message and interprets it using the working storage RAM. For instance, when receiv-
ing NOTE ON message, the CPU sends the note number and its velocity to the DSP in order to produce
sound of that note.
The following table shows the pin functions of LSI104.
Pin No.
Terminal
1
P50/TXD
2
P51/RXD
3
P52/SCK
4
-RESET
5
-NMI
6
VCC
7
-STBY
8
VSS
9, 10
XTAL, EXTAL
11, 12
MD1, MD0
13
AVSS
14 ~ 20
P70 ~ P76
21
P77
22
AVCC
23
P60
24 ~30
P61 ~ P67
31
VCC
32
P27
33 ~ 48
A0 ~ A14
40
VSS
49 ~ 56
D0 ~ D7
57, 58
P40, P41
59
P42
60
P43
61
P44
62
P45
63
P46
64
P47
DIGITAL SIGNAL PROCESSOR (LSI03: HG51B155FD-1)
Upon receipt of a note number and its velocity, the DSP reads sound and velocity data from the sound
source ROM in accordance with the received MIDI message. Then it provides 16-bit serial signal to the
DAC. If a control change message or "an effect change" of exclusive message has been received, the
DSP adds the effect to the sound data using the effect RAM.
The following table shows the pin functions of LSI103.

CIRCUIT DESCRIPTION

In/Out
Not used
In
MIDI signal input
Out
Reset signal output
In
Reset signal input
In
Power ON trigger signal input
In
+5V source
In
Standby signal input. Connected to +5V.
In
Ground (0V) source
In
20MHz clock input
In
Mode selection input
In
Ground (0V) source
In
Not used. Connected to ground.
In
DEMO button input signal
In
+5V source
Out
LED drive signal output
Not used
In
+5V source
Not used
Out
Address bus
In
Ground (0V) source
In/Out
Data bus
Not used.
Out
Power ON signal output
Out
Read enable signal output
In
Write enable signal output
Not used
Out
Terminal for 10 MHz clock check point
Not used. Connected to +5 V source.
— 10 —
Function

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