NEC Univerge SV8500 Operation And Maintenance Manual page 81

PIR3
PIR2
PIR1
TSW
PIR0
TSW : PH-SW10-A, etc.
MUX : PH-PC36
03/29/02
Figure 1-14 General System Block Diagram (1-IMG)
MUX
MUX
MUX
MUX
MUX INT
EXB INT
Local I/O BUS
EXB0
CPU0
PCI-Ex bus
(PCI Express)
: Circuit Card
: CPU Control Routes
PM Bus
LC/TRK LC/TRK
PM Bus
LC/TRK LC/TRK
PM Bus
LC/TRK LC/TRK
PM Bus
LC/TRK LC/TRK
BUS0 BUS1
EXB1
EMA
IOC
(option)
IOC
(option)
PCI-Ex bus
(PCI Express)
– 34 –
CHAPTER 1
MUX
MUX
MUX
TSW
MUX
MUX INT
EXB INT
Local I/O BUS
SV8500 Server
CPU1
: Signal
: Cable
General