Pid Control Block Diagram; Process Pid Control Setting - LG SV-iS5 Instruction Manual

PID Control Block Diagram

Sampling
Time
(10msec)
PID Ref
setting
Freq DRV-
Mode 04
Keypad-1
Keypad-2
0
V1
I
V2
1, 2
3, 4, 5
FU2-
Aux Ref Mode
49
Keypad-1
Keypad-2
V1
V1
I
V2
V2
Deviation
Morek IT OÜ, Rauna 24, 76506 Saue Harjumaa, Estonia. www.morek.eu Tel. +372 604 1423 Fax +372 604 1447 morek@morek.eu
FU2-50
PID output
direction:
(Target)
PID F Gain: Feed
Forward
K
f
Aux Ref Mode
FU2-
49
DRV-
PID REF
15
Display
PID
PID FBK
select
FU2-51
DRV-
PID FBK
15
I Display
P Gain2
0
K
I
K 2
P
K
P
K
D
FU2-52
FU2-53
FU2-54
FU2-59
Chapter 5 - Parameter Description [FU2]
PID upper limit
frequency
FU2-
55
Gain Limit
FU2-58
FU2-
PID Gain
56
Output
PID Low Limit
Frequency

Process PID Control Setting

Multi-function input
I/O- 12~14
terminal (P1~P6)
EXT- 2~4
setting
I Term Clear
K
FU2-60
PID P Gain Scale
PID P Gain
PID I Gain
PID D Gain
PID P2 Gain
PID
112
Freq
Multi-function
input terminal
(P1~P6) setting
FU2-
I/O-
PID Band
12~14
FU2-
EXT- 2~4
62
FU2-
PID
61
Band Con
proc PI dis
When PID error > PID
Band freq. & during
Acceleration
Target Freq.
proc PI mode
47
Accel/
Decel
DRV-
14
wTarFreq