Ic Block Diagrams - Hitachi L32R100 Service Manual

IC Block Diagram
U4
ADTRG(P53)
A N0 To An3
P50 TO P53)
AVCC,AVSS
TXD0(P90)
RXD0(P91)
SCLK0/CTSO(P92)
SCK(P60)
SO/SDA(P61)
SI/SCL(P62)
TA01N(P70)
TA1OUT(P71)
TA3OUT(P72)
TA41N(P73)
TA5OUT(P74)
CPU(TLCS-900/L1)
10-bit4-ch
XWA
AD
XBC
converter
XDE
XHL
XIX
XIY
XIZ
XSP
SIO/UART
(Channel/0)
Watchdog
Serial bus
interface
(SBI)
8-bit timer
(TMRA 0)
8-bit timer
(TMRA 1)
8-bit timer
(TMRA 2)
8-bit timer
(TMRA 3)
10-Kbyte RAM
8-bit timer
(TMRA 4)
8-bit timer
(TMRA 5)
T5BS4-9999 Block Diagram
High-speed
W A
oscillator
B C
D E
Clock gear
H L
IX
Low speed
IY
oscillator
IZ
SP
32 bits
SR F
PC
Port0
Port1
Port2
timer
(WDT)
Port3
RTC
Port9
Port6
CS/WAIT
controller
(4 blocks)
Interrupt
controller
16-bit timer
(TMRB0)
-25-
DVCC
DVSS
X1
X2
XT1(P96)
XT2(P97)
RESET
Am0
Am1
ALE
P00 to P07)
AD0 to Ad7
P10 to P17)
Ad8 A8 to AD15/A15
P20 to P25)
A0 A16 to A5/A21
RD(P30)
WR(P31)
HWR(P32)
P93
P94
P95
P40 to P42)
cs0 to cs2
NMI
INT0(P63)
TB0IN0/INT5(P80)
TB0IN1/INT5(P81)
TB0OUT0(P82)
TB0OUT1(P83)