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Ic Data - Yamaha RX-V4600/DSP Service Manual

Av receiver/av amplifier
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I IC DATA
IC501 : M30805SGP (CONTROL P.C.B)
16bit µ-COM (Main CPU)
P10/D8
109
P07/D7
110
P06/D6
111
P05/D5
112
P04/D4
113
P114
114
P113
115
P112
116
P111
117
P110
118
P03/D3
119
P02/D2
120
P01/D1
121
P00/D0
122
P157
123
P156
124
P155
125
M30805SGP
P154
126
P153
127
P152
128
P151
129
Vss
130
P150
131
Vcc
132
P107/AN7/KI3
133
P106/AN6/KI2
134
P105/AN5/KI1
135
P104/AN4/KI0
136
P103/AN3
137
P102/AN2
138
P101/AN1
139
Avss
140
P100/AN0
141
Vref
142
Avcc
143
P97/Adtrg/RxD4/SCL4/STxD4
144
8
I/O Port
Port P0
Port P1
Internal Peripheral Functions
A-D Converter (10 bits x 8 channels,
Timer
Expendable up to 10 channels)
Timer TA0 (16 bits)
Timer TA1 (16 bits)
UART/ Clock Synchronous
Timer TA2 (16 bits)
SI/O (8 bits x 5 channels)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
X-Y Converter
Timer TB0 (16 bits)
(16 bits x 16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
CRC arithmetic Circuit (CCITT)
Timer TB3 (16 bits)
(Polynomial: X16+X12+X5+1)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
M16C/80 Series 16-bit CPU core
Watchdog Timer
(15 bits)
R0H
R1H
D-A Converter
(8 bits x 2 channels)
72
P44/CS3/A20
71
P45/CS2/A21
70
P46/CS1/A22
69
P47/CS0/A23
68
P125
67
P126
66
P127
65
P50/WRL/WR/CASL
64
P51/WRH/BHE/CASH
63
P52/RD/DW
62
P53/BCLK/ALE/CLKout
61
P130
60
P131
59
Vcc
58
P132
57
Vss
56
P133
55
P54/HLDA/ALE
54
P55/HOLD
53
P56/ALE/RAS
52
P57/RDY
51
P134
50
P135
49
P136
48
P137
47
P60/CTS0/RTS0
46
P61/CLK0
45
P62/RXD0
44
P63/TXD0
43
P64/CTS1/RTS1/CTS0/CLKS1
42
P65/CLK1
41
Vss
40
P66/RXD1
39
Vcc
38
P67/TXD1
37
P70/TXD2/SDA/TA0out
8
8
8
8
8
8
Port P2
Port P3
Port P4
Port P5
Port P6
System Clock Generator
X
IN
- X
OUT
X
CIN
- X
COUT
Memory
RAM
24K
Registers
DRAM
FLG
Controller
R0L
R0H
R0L
INTB
R1L
R1H
R1L
ISP
R2
DRAM
R2
USP
Controller
R3
R3
PC
SVP
A0
Multiplier
VCT
A1
SVF
SVP
FB
SVP
VCT
SB
VCT
Port P15
Port P14
Port P13
Port P12
Port P11
8
7
8
8
5
IC501 : M30805SGP (CONTROL P.C.B)
16bit µ-COM (Main CPU)
I/O
No.
Port Name
Terminal Name
PowerOn
Standby MCUSleep [AC OFF]
1
TXDH
TXD4
SO
O
2
CLKH
CLK4
SO
O
3
LIMIT
LIMIT
DA
O
4
FAN
FAN
DA
O
5
TUDA
TUDA
O
O
6
TUCK
TUCK
O
O
7
1394INT
TB0in
TMR
I
8
PLLR
PLLR
I
I
9
TUE
TUCE
O
O
10
Z3MT
Z3MT
O
O
11
Z2MT
Z2MT
O
O
12
HPMT
HPMT
O
O
13
RCLK
RCLK
O
O
14
RDATA
RDATA
O
O
15
BYTE
BYTE
MCU
MCU
16
CNVss
CNVss
MCU
MCU
17
BT232C
BT232C
I
I
18
BTYDC
BTYDC
I
I
19
/RES
RESET
MCU
MCU
20
Xout
Xout
MCU
MCU
21
Vss
Vss
MCU
MCU
22
Xin
Xin
MCU
MCU
23
Vcc
Vcc
MCU
MCU
24
NMI
NMI
IRQ
I
25
REM
REM
IRQ
O
26
MZ2INT
Z2INT
IRQ
O
27
PDET
PDET
IRQ
I
28
VSY
VSY
TMR
O
29
CEF
CEF
O
O
30
RXDR
RXDR
TMR
O
31
PRY
PRY
O
O
32
/INTDSP
/INTDSP
TMR
O
33
/1394CTS
P74
I
I
34
PSW
PSW
TMR
O
35
/1394RTS
P72/CLK2
O
O
36
RxD1394
RxD2
SI
I
37
TXD1394
TXD2
SO
O
38
TXDR
TXDR
SO
SO
39
Vcc
Vcc
MCU
MCU
40
RXDR
RXDR
SI
SI
41
Vss
Vss
MCU
MCU
42
RTS
RTS
SO
SO
43
CTS
CTS
SI
SI
44
TXDD
TXDD
SO
O
45
RXDD
RXDD
SI
O
46
CLKD
CLKD
SO
O
47
IMUTE
P60
I
I
48
/CSDIR
/CSDIR
O
O
49
/CSDAC
/CSDAC
O
O
50
/CSY
/CSY
O
O
51
/CSTI
/CSTI
O
O
52
/WAIT
/WAIT
BUS
BUS
53
/RAS
BUS
BUS
54
/HOLD
BUS
BUS
55
/HLDA
BUS
BUS
56
SPIRDY
SPIDRY
I
O
57
Vss
Vss
MCU
MCU
58
RDSCE
RDSCE
O
O
59
Vcc
Vcc
MCU
MCU
RX-V4600/DSP-AX4600
Function
O
Transmission HDMI data
O
Transmission HDMI clock
O
Limiter control output
O
Temperature control FAN control ourput
O
PLL data output for tuner / Transmission clock 4us / LSB first
O
PLL clock output for tuner
O
RESERVE (Unconnected)
O
PLL reception for tuner / Reception clock 20us / LSB first
O
PLL chip select for tuner
O [ I ]
Zone3 MUTE control
O [ I ]
Zone2 MUTE control
O [ I ]
Headphone MUTE control
O
Recout SW control (ROHM) clock
O
Recout SW control (ROHM) data / Clock speed : 20us, MSBF
MCU
MCU
O
RS232C FLASH write mode detection / MULTI CH INPUT key detection
O
BOOT mode detection terminal for YDC
MCU
MCU
MCU
MCU
MCU
I
O
Remote control pulse input 1
O
Zone2, 3 power key interrupt
I
POWER DETECT detection
O
Vertical sync pulse INT
O
FL enable
O
RS232C, YDC reception detection
O
Power relay control
O
DIR or TI (DA601) interrupt
O
CTS 1394
O
Power SW
O
RTS 1394
O
Reception 1394 data
O
Transmission 1394 data
O
Normal RS-232C asynchronous communication data output / Data transmission terminal for AF220
MCU
O
Normal RS-232C asynchronous communication data input / Data reception terminal for AF220
MCU
O
Normal RS-232C asynchronous communication RTS output / Clock input for AF220
O
Normal RS-232C asynchronous communication CTS input
O
Serial data output to DIR, TI (DA601), YSS930, DAC DIR/YSS : 4M, LSBF TI : 1M, MSBF
O
Serial data input from DIR, TI (DA601), YSS930
O
Serial data clock output to DIR, TI (DA601), YSS930, DAC
O
1394 MUTE
O
DIR chip enable
O
DAC (common to 2ch/8ch) chip enable
O
YSS930 (common to #0/#1) chip enable
O
TI decoder DSPDA601 chip enable
BUS
YGV/WAIT input
BUS
BUS
BUS
O
DIR WCK input (WCK input for Suyama mode write)
MCU
O
RDS CE
MCU
55

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Ax4600Rx-v4600Dsp-ax4600