Philips 55PFL5706/F7 Service Manual page 44

Digital Main 10 Schematic Diagram
1 NOTE:
The order of pins shown in this diagram is different from that of actual IC3104.
IC3104 is divided into eight and shown as IC3104 (1/8) ~ IC3104 (8/8) in this Digital Main Schematic Diagram Section.
4
*1
IC3104(8/8)
MN2WS0170
DIGITAL SIGNAL PROCESS
/MAIN MICRO CONTROLLER
MII_CRS T7
MII-COL Y1
MII-RXCLK U7
RMII-RXD0 AA3
RMII-RXD1 W5
3
RMII-RXD2 W4
RMII-RXD3 AB2
RMII-RXDV W3
RMII-RXER AC1
MII-TXCLK AA2
RMII-TXD0 Y3
RMII-TXD1 V6
RMII-TXD2 Y4
RMII-TXD3 Y2
2
RMII-TXEN Y5
MII-MDC W6
MII-MDIO AC2
MII-MDIO-INTL AB3
HUB-RESET AD1
WAKEUP V5
WUC AB1
CONTINUE
DIGITAL 6
P-ON+3.3V
1
BC
C3753
OPEN
R3737 R3718
1K 4.7K
R3857 56
R3858 56
R3859 33
R3871 56
R3872 56
R3873 56
R3874 56
R3875 56
R3741
R3967
R3739 R3740
OPEN
R3876 56 1K
OPEN 1K
R3733
33
R3738
C3708 C3756 R3954 R3745
1K
10P 10P 1K 1K
R3732
R3829 33 33
R3842 56
C3709 C3755
10P 10P
R3844 56
R3845 56
R3852 56
R3853 56
R3854 56
R3855 56
R3856 56
R3877 56
R3878 R3879
10K 10K
R3860
10K
BD BE
DIGITAL MAIN CBA UNIT
R3746
BEAD
R3837
OPEN
R3727 R3966 R3726 R3723
1K OPEN 1K 4.7K
C3735
15P
R3701 X3701
16 15 14 13 12 11 10 9
OPEN 25MHz
C3734
R3703
15P
0
17 VDD25 XO 8
18 7
SYMOBOL DECODER
19 6
/ALIGNMENT
PHY
20 5
21 INT 4
VDD25
22 3
-REG
SYMOBOL
23 VDD 2
ENCODER
VDD12
24 1
-REG
C3730 C3732 C3733
1 0.1 1
25 26 27 28 29 30 31 32
IC3705
AR8032-BL1A
R3754
(ETHERNET I/F)
2.37K
R3719 R3722 R3736 R3735
1K 1K 1K 1K
BC3704
BK1608HS601-T
BF
10-14
CN3706 (ETHERNET CONNECTOR)
1 TD(+)
2 TCT
3 TD(-)
4 RD(+)
5 RCT
6 RD(-)
7 NU
R3749 R3748 R3747 R3750 C3701
8 GND
49.9 49.9 49.9 49.9 0.022
C3714 C3702
0.1 0.1
C3737
0.1
C3736
0.1
BG BH
PL11.8SCD10