D-Board (2 Of 2) Block Diagram - Panasonic TH-50PX60U Service Manual

TH-50PX60U

14.36. D-Board (2 of 2) Block Diagram

D DIGITAL SIGNAL PROCESSOR
FORMAT CONVERTER
PLASMA AI
SUB-FIELD PROCESSOR
1
2
3
4
BUS SW
5
FLASH CONTROL
6
JTAG
7
DISCHARGE CONTROL
8
9
10
11
12
13
14
Control DATA(U)
15
Control DATA(D)
16
SS PULSE
17
SC PULSE
18
LEVEL CONVERTER
LEVEL CONVERTER
LEVEL CONVERTER
SOS9_C0NF
19
DRV_RST
20
IC9802,03
LEVEL CONVERTER
SOS6,7,8
21
TH-50PX60U
D-Board (2 of 2) Block Diagram
IC9400
PD1-M<RIGHT>
FORMAT CONVERTER/RGB PROCESSOR<R>
R 10bit
CTI/TINT
G 10bit I/P
FORMAT COLOR
CONVERTER CONVERTER CONTRAST
B 10bit
WB-ADJ
st-r
SFRST
SFVRST
VD
LATCH
VD
HD FPCLK
HD
FPDAT0
DCK
DCK JTAG FPDAT1
PCK OCK
TD0,TD1,TMS,TCK
60MHz
14
36.6MHz
4
20MHz
CLKM_IN
13
84MHz FREE_RUN
12
R10-R19,G10-G19,B10-B19
PCK OCK
JTAG
SFRST
SFVRST
LATCH
FORMAT CONVERTER/RGB PROCESSOR<L>
FPCLK
FPDAT0
FPDAT1
R 10bit
CTI/TINT
G 10bit I/P
FORMAT COLOR
CONTRAST
B 10bit CONVERTER CONVERTER
WB-ADJ
st-r
VD
VD
HD
HD
DCK
DCK
IC9504
3.3V 5V
ODEU-R,ODEU-L,PCU1,PCU2,LEU,CLRU
IC9505
3.3V 5V
ODED-R,ODED-L,PCD1,PCD2,LED,CLRD
IC9503
3.3V 5V
Sustain Control DATA 8bit
UMH,UML,USH,USL,UEH,NUEL,URH,URL
3.3V 5V
Scan Control DATA 13bit
CL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,CBK,CSL,CSH,CML,CMH
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<R>
R 10bit
NEW SUB-FIELD DATA
G 10bit
PLASMA AI PROCESSOR DRIVER
B 10bit
XRST
XCE-R
XRST2
IC9304
IC9602
RESET 16M FLASH MEMORY
P3.3V
DQ0-DQ3
5 VCC VOUT 4 RESET
CLK5 X9500
DQ4-DQ15
XT 1
XCE-L
CLK9 IC9200
XOE
CLK6 XWE A0-A19
CLOCK GENE. BYTE
XTN 20
CLK7
IC9402
DA14,DA15-DC15<L>
BUS SW
BUS
UA05-UC12,UC13,UA15<L>
SWITCH
XRST
XRST XCE-L
IC9300
PD1-M<LEFT>
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<L>
R 10bit
SUB-FIELD DATA
NEW
G 10bit
PLASMA AI PROCESSOR DRIVER
B 10bit
106
IC9401
DDR SDRAM<R>(128M)
36bit UA00-UC11<R>
DRVCLKU0-U3,DRVCLKD0-D3
Video DATA 36bit UA00-UC11<R> 12bit UA08-UC11<L>
Video DATA 36bit DA00-DC11<R>
CLKU3
ROMDATA04-15 UA12-UC15<L>
CLKU2
CLKU0
ROMDATA00-03 DA14,DA15-DC15<L>
CLKU1
CLKU2
CLKU3
ODEU-R
CLRU
PCU2
LEU
Q9302
P5V
DA14,DA15-DC15<L>
TP065
UA12-UC15<L>
UA05-UC10,UB11,UC11<L>
24bit UA00-UC07<L>
CLKU1
CLKU0
ODEU-L
CLRU
PCU1
LEU
UA12-UC12,UC13,UA15
Q9301
P5V
UA05-UC11
TP063
IC9301
DDR SDRAM<L>(128M)
36bit DA00-DC11<R>
12bit DA08-DC11<L>
ROMDATA00-03 DA14,DA15-DC15<L>
ROMDATA04-15 UA12-UC15<L>
CLKD3
Video DATA 36bit UA00-UC11<L>
CLKD2
CLKD0
Video DATA 36bit DA00-DC11<L>
CLKD1
CLKD2
CLKD3
DRVCLKU0-U3,DRVCLKD0-D3
ODED-R
CLRD
PCD2
LED
Q9402
P5V
TP066
24bit DA00-DC07<L>
CLKD1
CLKD0
ODED_L
CLRD
PCD1
LED
Q9401 Q9400
P5V
TP9402
SOS8_SS
SOS6_SC1
SOS7_SC2
TH-50PX60U
D-Board (2 of 2) Block Diagram
R-UP
D31 TO C21
12
DOUTUA8
31
36
48 DOUTUC23
58
77
10 CLKU3-L
CLKU2-L
9
33 CLKU0-R
34 CLKU1-R
55 CLKU2-R
56 CLKU3-R
53 ODEU
52 CLRU
51 PCU2
50 LEU
80 5VDET
4
P5V
1
L-UP
D32 TO C31
DOUTUA0
21
47 DOUTUC7
14 CLKU1-L
12 CLKU0-L
19 ODEU
18 CLRU
17 PCU1
16 LEU
1 5VDET
52
P5V
55
R-DOWN
D34 TO C51
4
23 DOUTDC23
33
45
DOUTDA8
50
69
71 CLKD3-L
72 CLKD2-L
48 CLKD0-R
CLKD1-R
47
26 CLKD2-R
25 CLKD3-R
28 ODED-R
29 CLRD
30 PCD2
31 LED
1 5VDET
77
P5V
80
L-DOWN
D33 TO C41
DOUTDA0
9
35
DOUTDC7
42 CLKD1-L
43 CLKD0-L
37 ODED
38 CLRD
39 PCD1
40 LED
52
SUSTAIN
DATA
46
58 5VDET
4
P5V
1
45 SOS8_SS
D20 TO SC20
2
9 SCAN
DATA
13
P5V
20
1 P5V
11 SOS6-SC1
12 SOS7-SC2