CD-C600
Pin
Function
I/O
No.
Name
1 EFMlN
Al
2 RFOUT
AO
3 LPF
AO
4 PHLPF
AO
5 AIN
AI
6 CIN
Al
7 BIN
AI
8 DIN
AI
9 SLCISET
AI
10 RFMON
AO
11 VREF
AO
12 JITTC
AO
13 EIN
AI
14 FIN
AI
15 PCNCNT
AI
16 TE
AO
17 TEIN
AI
18 LDD
AO
19 LDS
AI
20 AVSS
—
21 AVDD
—
22 FDO
AO
23 TDO
AO
24 SLDO
AO
25 SPDO
AO
26 VVSS1
—
27 PDOUT1
O
28 PDOUT0
O
29 PCKIST
AI
30 VVDD1
—
31 CONT5
O
32 CONT3
I/O
33 DEFECT
I/O
34 FSEQ
I/O
35 C2F
I/O
36 DVDD
—
37 DVSS
—
38 DVDD15
AO
39 VVDD3
—
40 VVSS3
—
41 DVDD
—
42 DVSS
—
43 CE
I
44 CL
I
45 DI
I
46 DO
O
47 RESB
I
48 REG_READY0
O
49 SUB_READY0
O
50 CONT2
I/O
51 CONT1
I/O
52 CONT0
I/O
53 MODE
I
54 STREQ
I/O
55 STCK
I/O
56 STDATA
I/O
57 TEST
I
58 DATA
I/O
59 DATACK
I/O
60 LRSY
I/O
61 DVDD
—
62 PCMLRSY
O
63 PCMBCK
O
64 PCMDATA
O
65 PCMREQ
I
66 DVDD15
AO
67 DVSS
—
68 DVDD
—
26
State During a Reset
Input
RF signal input
Undefined
RF signal output
Undefined
RF signal DC level detection low-pass filter capacitor connection
Undefined
Defect detection low-pass filter capacitor connection
Input
A signal input
Input
C signal input
Input
B signal input
Input
D signal input
Input
SLCO output current setting resistor connection
Undefined
IC internal analog signal monitor
AVDD/2
VREF voltage output
Undefined
Jitter detection capacitor connection
Input
E signal input
Input
F signal input
Input
EFM PLL charge pump control voltage input
Undefined
TE signal output
Input
TE signal input used for TES signal generation
Undefined
Laser power control signal output
Input
Laser power detection signal input
—
Analog system ground / This pin must be connected to the 0 V level
—
Analog system power supply
AVDD/2
Focus control signal output / D/A converter output
AVDD/2
Tracking control signal output / D/A converter output
AVDD/2
Sled control signal output / D/A converter output
AVDD/2
Spindle control signal output / D/A converter output
—
Undefined
Undefined
For use by the EFM PLL circuit
Input
—
Low
General purpose output
Input
General purpose input/output (Built-in pull-up resistor)
Input
Monitor output pin (Defect detection signal output : High-active)
Input
Monitor output pin (CD sync. signal detection output : High-active)
Input
Monitor output pin (C2 error signal output : High-active)
—
Digital system power supply
—
Digital system ground / This pin must be connected to the 0 V level
High
Digital circuit power supply capacitor connection
—
Internal PLL power supply
—
Internal PLL ground / This pin must be connected to the 0 V level
—
Digital system power supply
—
Digital system ground / This pin must be connected to the 0 V level
Input
Input
Host microprocessor interface
Input
Hi-Z (H)
—
IC reset input / This pin must be set low once after power is first applied
Low
Host microprocessor interface
Low
Input
General purpose input/output
Input
General purpose input/output
Input
General purpose input/output
—
Set input / This pin must be connected to the DVDD
Input
Stream data demand signal output
Input
Stream data bit clock input
Input
Stream data input
—
Test input / This pin must be connected to the 0 V level
Input
Monitor pin / Audio data output
Input
Monitor pin / Audio bit clock output
Input
Monitor pin / Audio Left/Right channel clock output
—
Digital system power supply
Low
Monitor pin / Audio Left/Right channel clock output
Low
Monitor pin / Audio data shift clock output
Low
Monitor pin / Audio data serial output
Input
Monitor pin / Audio data output request signal input
High
Digital circuit power supply capacitor connection
—
Digital system ground / This pin must be connected to the 0 V level
—
Digital system power supply
Detail of Function
Internal VCO ground / This pin must be connected to the 0 V level
Internal VCO control phase comparator output 1
Internal VCO control phase comparator output 0
PDOUT0, 1 output current setting resistor connection pin
Internal VCO power supply
Host I/F : Chip enable signal input
Host I/F : Data transfer clock input
Host I/F : Data input
Host I/F : Data output (Trial-state output)
Host I/F : REG_READY output (Nch-opendrain output)
Host I/F : SUB_READY output (Nch-opendrain output)